#include "omap.h"
#include "irq.h"
#include "devices.h"
+#include "hw.h"
#define OMAP3_HSUSB_DEBUG
uint8_t forcestdby;
};
+static void omap3_hsusb_otg_save_state(QEMUFile *f, void *opaque)
+{
+ struct omap3_hsusb_otg_s *s = (struct omap3_hsusb_otg_s *)opaque;
+
+ qemu_put_be16(f, s->sysconfig);
+ qemu_put_byte(f, s->interfsel);
+ qemu_put_byte(f, s->simenable);
+ qemu_put_byte(f, s->forcestdby);
+}
+
+static int omap3_hsusb_otg_load_state(QEMUFile *f, void *opaque, int version_id)
+{
+ struct omap3_hsusb_otg_s *s = (struct omap3_hsusb_otg_s *)opaque;
+
+ if (version_id)
+ return -EINVAL;
+
+ s->sysconfig = qemu_get_be16(f);
+ s->interfsel = qemu_get_byte(f);
+ s->simenable = qemu_get_byte(f);
+ s->forcestdby = qemu_get_byte(f);
+
+ return 0;
+}
+
static void omap3_hsusb_otg_reset(struct omap3_hsusb_otg_s *s)
{
s->rev = 0x33;
s->musb = musb_init(qemu_allocate_irqs(omap3_hsusb_musb_core_intr, s, __musb_irq_max));
omap3_hsusb_otg_reset(s);
+
+ register_savevm("omap3_hsusb_otg", -1, 0,
+ omap3_hsusb_otg_save_state,
+ omap3_hsusb_otg_load_state,
+ s);
}
struct omap3_hsusb_host_s {
s->firstbyte = 1;
}
+static void twl4030_save_state(QEMUFile *f, void *opaque)
+{
+ struct twl4030_s *s = (struct twl4030_s *)opaque;
+ int i;
+
+ qemu_put_sbe32(f, s->key_cfg);
+ qemu_put_sbe32(f, s->key_tst);
+ for (i = 0; i < 64; i++)
+ qemu_put_buffer(f, s->seq_mem[i], 4);
+ for (i = 0; i < 5; i++) {
+ qemu_put_sbe32(f, s->i2c[i]->firstbyte);
+ qemu_put_byte(f, s->i2c[i]->reg);
+ qemu_put_buffer(f, s->i2c[i]->reg_data, sizeof(s->i2c[i]->reg_data));
+ }
+}
+
+static int twl4030_load_state(QEMUFile *f, void *opaque, int version_id)
+{
+ struct twl4030_s *s = (struct twl4030_s *)opaque;
+ int i;
+
+ if (version_id)
+ return -EINVAL;
+
+ s->key_cfg = qemu_get_sbe32(f);
+ s->key_tst = qemu_get_sbe32(f);
+ for (i = 0; i < 64; i++)
+ qemu_get_buffer(f, s->seq_mem[i], 4);
+ for (i = 0; i < 5; i++) {
+ s->i2c[i]->firstbyte = qemu_get_sbe32(f);
+ s->i2c[i]->reg = qemu_get_byte(f);
+ qemu_get_buffer(f, s->i2c[i]->reg_data, sizeof(s->i2c[i]->reg_data));
+ }
+
+ return 0;
+}
+
struct twl4030_s *twl4030_init(i2c_bus *bus, qemu_irq irq)
{
int i;
s->i2c[3]->i2c.send = twl4030_4b_tx;
twl4030_4b_reset(&s->i2c[3]->i2c);
i2c_set_slave_address((i2c_slave *)&s->i2c[3]->i2c,0x4b);
- /*TODO:other group*/
-
- //register_savevm("menelaus", -1, 0, menelaus_save, menelaus_load, s);
- return s;
-}
-
-#if 0
-static uint8_t twl4030_read(void *opaque, uint8_t addr)
-{
-// struct twl4030_s *s = (struct twl4030_s *) opaque;
-// int reg = 0;
-
- printf("twl4030_read addr %x\n",addr);
-
- switch (addr)
- {
- default:
-#ifdef VERBOSE
- printf("%s: unknown register %02x\n", __FUNCTION__, addr);
-#endif
- //exit(-1);
- break;
- }
- return 0x00;
-}
-
-static void twl4030_write(void *opaque, uint8_t addr, uint8_t value)
-{
-// struct twl4030_s *s = (struct twl4030_s *) opaque;
-// int line;
-// int reg = 0;
-// struct tm tm;
-
- printf("twl4030_write addr %x value %x \n",addr,value);
-
- switch (addr)
- {
- case 0x82:
- case 0x85:
- /*mmc*/
- break;
- default:
-#ifdef VERBOSE
- printf("%s: unknown register %02x\n", __FUNCTION__, addr);
-#endif
- //exit(-1);
- break;
- }
-}
+ register_savevm("twl4030", -1, 0,
+ twl4030_save_state, twl4030_load_state, s);
-
-static int twl4030_tx(i2c_slave *i2c, uint8_t data)
-{
- struct twl4030_s *s = (struct twl4030_s *) i2c;
- /* Interpret register address byte */
- if (s->firstbyte) {
- s->reg = data;
- s->firstbyte = 0;
- } else
- twl4030_write(s, s->reg ++, data);
-
- return 0;
-}
-
-static int twl4030_rx(i2c_slave *i2c)
-{
- struct twl4030_s *s = (struct twl4030_s *) i2c;
-
- return twl4030_read(s, s->reg ++);
-}
-
-static void twl4030_reset(i2c_slave *i2c)
-{
- struct twl4030_s *s = (struct twl4030_s *) i2c;
- s->reg = 0x00;
-}
-
-static void twl4030_event(i2c_slave *i2c, enum i2c_event event)
-{
- struct twl4030_s *s = (struct twl4030_s *) i2c;
-
- if (event == I2C_START_SEND)
- s->firstbyte = 1;
-}
-
-i2c_slave *twl4030_init(i2c_bus *bus, qemu_irq irq)
-{
- struct twl4030_s *s = (struct twl4030_s *)
- i2c_slave_init(bus, 0, sizeof(struct twl4030_s));
-
- s->i2c.event = twl4030_event;
- s->i2c.recv = twl4030_rx;
- s->i2c.send = twl4030_tx;
-
- s->irq = irq;
- //s->rtc.hz_tm = qemu_new_timer(rt_clock, menelaus_rtc_hz, s);
- //s->in = qemu_allocate_irqs(menelaus_gpio_set, s, 3);
- //s->pwrbtn = qemu_allocate_irqs(menelaus_pwrbtn_set, s, 1)[0];
-
- twl4030_reset(&s->i2c);
-
- //register_savevm("menelaus", -1, 0, menelaus_save, menelaus_load, s);
-
- return &s->i2c;
+ return s;
}
-#endif
-
-