2 * Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
4 * (c) Copyright 1996 - 2001 Gary Henderson (gary.henderson@ntlworld.com) and
5 * Jerremy Koot (jkoot@snes9x.com)
7 * Super FX C emulator code
8 * (c) Copyright 1997 - 1999 Ivar (ivar@snes9x.com) and
10 * Super FX assembler emulator code (c) Copyright 1998 zsKnight and _Demo_.
12 * DSP1 emulator code (c) Copyright 1998 Ivar, _Demo_ and Gary Henderson.
13 * C4 asm and some C emulation code (c) Copyright 2000 zsKnight and _Demo_.
14 * C4 C code (c) Copyright 2001 Gary Henderson (gary.henderson@ntlworld.com).
16 * DOS port code contains the works of other authors. See headers in
19 * Snes9x homepage: http://www.snes9x.com
21 * Permission to use, copy, modify and distribute Snes9x in both binary and
22 * source form, for non-commercial purposes, is hereby granted without fee,
23 * providing that this license information and copyright notice appear with
24 * all copies and any derived work.
26 * This software is provided 'as-is', without any express or implied
27 * warranty. In no event shall the authors be held liable for any damages
28 * arising from the use of this software.
30 * Snes9x is freeware for PERSONAL USE only. Commercial users should
31 * seek permission of the copyright holders first. Commercial use includes
32 * charging money for Snes9x or software derived from Snes9x.
34 * The copyright holders request that bug fixes and improvements to the code
35 * should be forwarded to them so everyone can benefit from the modifications
38 * Super NES and Super Nintendo Entertainment System are trademarks of
39 * Nintendo Co., Limited and its subsidiary companies.
49 struct { uint8 A, Y; } B;
56 uint8 *DirectPage; // 0x00
57 uint32 Address; // 0x04 c core only
58 uint8 *WaitAddress1; // 0x08
59 uint8 *WaitAddress2; // 0x0C
60 uint32 WaitCounter; // 0x10
61 uint8 *ShadowRAM; // 0x14
62 uint8 *CachedSamples; // 0x18
63 uint8 _Carry; // 0x1C c core only
64 uint8 _Overflow; // 0x1D c core only
65 uint8 Bit; // 0x1E c core only
67 uint32 TimerErrorCounter; // 0x20
68 uint32 Scanline; // 0x24
69 int32 OneCycle; // 0x28
70 int32 TwoCycles; // 0x2C
71 // notaz: reordered and moved everything here, for faster context load/save
72 uint32 *asmJumpTab; // 0x30
74 YAndA YA; // 0x38 0x0000YYAA
75 uint8 P; // 0x3C flags: NODBHIZC
78 uint8 _Zero; // 0x3F Z=0, when this!=0; also stores neg flag in &0x80
80 uint8 S; // 0x41 stack pointer, default: 0xff
84 uint8 *ExtraRAM; // 0x48 shortcut to APU.ExtraRAM
97 uint16 TimerTarget [3];
98 bool8 TimerEnabled [3];
99 bool8 TimerValueWritten [3];
102 EXTERN_C struct SAPU APU;
103 EXTERN_C struct SIAPU IAPU;
105 STATIC inline void S9xAPUUnpackStatus()
107 IAPU._Zero =((IAPU.P & Zero) == 0) | (IAPU.P & Negative);
110 IAPU._Carry = (IAPU.P & Carry);
111 IAPU._Overflow = (IAPU.P & Overflow);
115 STATIC inline void S9xAPUPackStatus()
118 IAPU.P &= ~(Zero | Negative);
119 if(!IAPU._Zero) IAPU.P |= Zero;
120 if(IAPU._Zero & 0x80) IAPU.P |= Negative;
122 IAPU.P &= ~(Zero | Negative | Carry | Overflow);
123 if(IAPU._Carry) IAPU.P |= Carry;
124 if(!IAPU._Zero) IAPU.P |= Zero;
125 if(IAPU._Overflow) IAPU.P |= Overflow;
126 if(IAPU._Zero & 0x80) IAPU.P |= Negative;
131 void S9xResetAPU (void);
133 void S9xDeinitAPU ();
134 void S9xDecacheSamples ();
136 int S9xAPUOPrint (char *buffer, uint16 Address);
137 void S9xSetAPUControl (uint8 byte);
138 void S9xSetAPUDSP (uint8 byte);
139 uint8 S9xGetAPUDSP ();
140 void S9xSetAPUTimer (uint16 Address, uint8 byte);
141 void S9xOpenCloseSoundTracingFile (bool8);
142 void S9xPrintAPUState ();
143 extern int32 S9xAPUCycles [256]; // Scaled cycle lengths
144 extern int32 S9xAPUCycleLengths [256]; // Raw data.
145 extern void (*S9xApuOpcodes [256]) (void);
146 extern void (*S9xApuOpcodesReal [256]) (void);
150 #define APU_VOL_LEFT 0x00
151 #define APU_VOL_RIGHT 0x01
152 #define APU_P_LOW 0x02
153 #define APU_P_HIGH 0x03
154 #define APU_SRCN 0x04
155 #define APU_ADSR1 0x05
156 #define APU_ADSR2 0x06
157 #define APU_GAIN 0x07
158 #define APU_ENVX 0x08
159 #define APU_OUTX 0x09
161 #define APU_MVOL_LEFT 0x0c
162 #define APU_MVOL_RIGHT 0x1c
163 #define APU_EVOL_LEFT 0x2c
164 #define APU_EVOL_RIGHT 0x3c
166 #define APU_KOFF 0x5c
168 #define APU_ENDX 0x7c
171 #define APU_PMON 0x2d
187 #define APU_SOFT_RESET 0x80
188 #define APU_MUTE 0x40
189 #define APU_ECHO_DISABLED 0x20
191 #define FREQUENCY_MASK 0x3fff