#define DEF_HELPER(ret, name, params) ret name params;
#endif
+DEF_HELPER(void, helper_ldtlb, (void))
+DEF_HELPER(void, helper_raise_illegal_instruction, (void))
+DEF_HELPER(void, helper_raise_slot_illegal_instruction, (void))
+DEF_HELPER(void, helper_debug, (void))
+DEF_HELPER(void, helper_sleep, (void))
+DEF_HELPER(void, helper_trapa, (uint32_t))
clr_t();
}
-void OPPROTO op_ldtlb(void)
-{
- helper_ldtlb();
- RETURN();
-}
-
void OPPROTO op_frchg(void)
{
env->fpscr ^= FPSCR_FR;
RETURN();
}
-void OPPROTO op_trapa(void)
-{
- env->tra = PARAM1 << 2;
- env->exception_index = 0x160;
- do_raise_exception();
- RETURN();
-}
-
void OPPROTO op_ldcl_rMplus_rN_bank(void)
{
env->gregs[PARAM2] = env->gregs[PARAM1];
RETURN();
}
-void OPPROTO op_raise_illegal_instruction(void)
-{
- env->exception_index = 0x180;
- do_raise_exception();
- RETURN();
-}
-
-void OPPROTO op_raise_slot_illegal_instruction(void)
-{
- env->exception_index = 0x1a0;
- do_raise_exception();
- RETURN();
-}
-
-void OPPROTO op_debug(void)
-{
- env->exception_index = EXCP_DEBUG;
- cpu_loop_exit();
-}
-
-void OPPROTO op_sleep(void)
-{
- env->halted = 1;
- env->exception_index = EXCP_HLT;
- cpu_loop_exit();
-}
-
/* Load and store */
#define MEMSUFFIX _raw
#include "op_mem.c"
#include <assert.h>
#include "exec.h"
-void do_raise_exception(void)
-{
- cpu_loop_exit();
-}
-
#ifndef CONFIG_USER_ONLY
#define MMUSUFFIX _mmu
cpu_restore_state(tb, env, pc, NULL);
}
}
- do_raise_exception();
+ cpu_loop_exit();
}
env = saved_env;
}
#endif
}
+void helper_raise_illegal_instruction(void)
+{
+ env->exception_index = 0x180;
+ cpu_loop_exit();
+}
+
+void helper_raise_slot_illegal_instruction(void)
+{
+ env->exception_index = 0x1a0;
+ cpu_loop_exit();
+}
+
+void helper_debug(void)
+{
+ env->exception_index = EXCP_DEBUG;
+ cpu_loop_exit();
+}
+
+void helper_sleep(void)
+{
+ env->halted = 1;
+ env->exception_index = EXCP_HLT;
+ cpu_loop_exit();
+}
+
+void helper_trapa(uint32_t tra)
+{
+ env->tra = tra << 2;
+ env->exception_index = 0x160;
+ cpu_loop_exit();
+}
+
void helper_addc_T0_T1(void)
{
uint32_t tmp0, tmp1;
} else {
tcg_gen_movi_i32(cpu_pc, dest);
if (ctx->singlestep_enabled)
- gen_op_debug();
+ tcg_gen_helper_0_0(helper_debug);
tcg_gen_exit_tb(0);
}
}
delayed jump as immediate jump are conditinal jumps */
tcg_gen_mov_i32(cpu_pc, cpu_delayed_pc);
if (ctx->singlestep_enabled)
- gen_op_debug();
+ tcg_gen_helper_0_0(helper_debug);
tcg_gen_exit_tb(0);
} else {
gen_goto_tb(ctx, 0, ctx->delayed_pc);
#define CHECK_NOT_DELAY_SLOT \
if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) \
- {gen_op_raise_slot_illegal_instruction (); ctx->bstate = BS_EXCP; \
+ {tcg_gen_helper_0_0(helper_raise_slot_illegal_instruction); ctx->bstate = BS_EXCP; \
return;}
void _decode_opc(DisasContext * ctx)
#if defined(CONFIG_USER_ONLY)
assert(0); /* XXXXX */
#else
- gen_op_ldtlb();
+ tcg_gen_helper_0_0(helper_ldtlb);
#endif
return;
case 0x002b: /* rte */
return;
case 0x001b: /* sleep */
if (ctx->memidx) {
- gen_op_sleep();
+ tcg_gen_helper_0_0(helper_sleep);
} else {
- gen_op_raise_illegal_instruction();
+ tcg_gen_helper_0_0(helper_raise_illegal_instruction);
ctx->bstate = BS_EXCP;
}
return;
gen_op_stb_T0_T1(ctx);
return;
case 0xc300: /* trapa #imm */
- CHECK_NOT_DELAY_SLOT tcg_gen_movi_i32(cpu_pc, ctx->pc);
- gen_op_trapa(B7_0);
+ CHECK_NOT_DELAY_SLOT
+ tcg_gen_movi_i32(cpu_pc, ctx->pc);
+ tcg_gen_movi_i32(cpu_T[0], B7_0);
+ tcg_gen_helper_0_1(helper_trapa, cpu_T[0]);
ctx->bstate = BS_BRANCH;
return;
case 0xc800: /* tst #imm,R0 */
fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n",
ctx->opcode, ctx->pc);
- gen_op_raise_illegal_instruction();
+ tcg_gen_helper_0_0(helper_raise_illegal_instruction);
ctx->bstate = BS_EXCP;
}
if (ctx.pc == env->breakpoints[i]) {
/* We have hit a breakpoint - make sure PC is up-to-date */
tcg_gen_movi_i32(cpu_pc, ctx.pc);
- gen_op_debug();
+ tcg_gen_helper_0_0(helper_debug);
ctx.bstate = BS_EXCP;
break;
}
if (tb->cflags & CF_LAST_IO)
gen_io_end();
if (env->singlestep_enabled) {
- gen_op_debug();
+ tcg_gen_helper_0_0(helper_debug);
} else {
switch (ctx.bstate) {
case BS_STOP: