fix OMAP3 uart init so it works with vmstate load/save

diff --git a/hw/beagle.c b/hw/beagle.c
index ddceefd..2622674 100644 (file)
--- a/hw/beagle.c
+++ b/hw/beagle.c
@@ -55,11 +55,8 @@ static void beagle_init(ram_addr_t ram_size, int vga_ram_size,
         fprintf(stderr, "%s: missing SecureDigital device\n", __FUNCTION__);
         exit(1);
     }
-       s->cpu = omap3530_mpu_init(ram_size, NULL);
+       s->cpu = omap3530_mpu_init(ram_size, NULL, NULL, serial_hds[0]);
     
-    if (serial_hds[0])
-        omap_uart_attach(s->cpu->uart[2], serial_hds[0]);
-
        s->nand = nand_init(NAND_MFR_MICRON, 0xba); /* MT29F2G16ABC */
        nand_setpins(s->nand, 0, 0, 0, 1, 0); /* no write-protect */
     omap_gpmc_attach(s->cpu->gpmc, BEAGLE_NAND_CS, 0, NULL, NULL, s, s->nand);

diff --git a/hw/omap.h b/hw/omap.h
index 9972238..055a112 100644 (file)
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -1237,7 +1237,9 @@ struct omap_mpu_state_s *omap2420_mpu_init(unsigned long sdram_size,
 
 /* omap3.c */
 struct omap_mpu_state_s *omap3530_mpu_init(unsigned long sdram_size,
-                const char *core);
+                                           CharDriverState *chr_uart1,
+                                           CharDriverState *chr_uart2,
+                                           CharDriverState *chr_uart3);
 void omap3_set_mem_type(struct omap_mpu_state_s *s, int bootfrom);
 
 /* omap3_boot.c */

diff --git a/hw/omap1.c b/hw/omap1.c
index 0c9123b..e38b918 100644 (file)
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -2202,9 +2202,12 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
 void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
 {
     /* TODO: Should reuse or destroy current s->serial */
+    fprintf(stderr, "%s: WARNING - this function is broken, avoid using it\n",
+            __FUNCTION__);
     s->serial = serial_mm_init(s->base, 2, s->irq,
-                    omap_clk_getrate(s->fclk) / 16,
-                    chr ?: qemu_chr_open("null", "null", NULL), 1);
+                               omap_clk_getrate(s->fclk) / 16,
+                               chr ?: qemu_chr_open("null", "null", NULL),
+                               1);
 }
 
 /* MPU Clock/Reset/Power Mode Control */

diff --git a/hw/omap3.c b/hw/omap3.c
index 6ffc65e..6685a9d 100644 (file)
--- a/hw/omap3.c
+++ b/hw/omap3.c
@@ -4426,7 +4426,9 @@ static int omap3_validate_addr(struct omap_mpu_state_s *s,
 }
 
 struct omap_mpu_state_s *omap3530_mpu_init(unsigned long sdram_size,
-                                           const char *core)
+                                           CharDriverState *chr_uart1,
+                                           CharDriverState *chr_uart2,
+                                           CharDriverState *chr_uart3)
 {
     struct omap_mpu_state_s *s = (struct omap_mpu_state_s *)
         qemu_mallocz(sizeof(struct omap_mpu_state_s));
@@ -4569,19 +4571,22 @@ struct omap_mpu_state_s *omap3530_mpu_init(unsigned long sdram_size,
                                  omap_findclk(s, "omap3_uart1_fclk"),
                                  omap_findclk(s, "omap3_uart1_iclk"),
                                  s->drq[OMAP3XXX_DMA_UART1_TX],
-                                 s->drq[OMAP3XXX_DMA_UART1_RX], 0);
+                                 s->drq[OMAP3XXX_DMA_UART1_RX],
+                                 chr_uart1);
     s->uart[1] = omap2_uart_init(omap3_l4ta_init(s->l4, L4A_UART2),
                                  s->irq[0][OMAP_INT_3XXX_UART2_IRQ],
                                  omap_findclk(s, "omap3_uart2_fclk"),
                                  omap_findclk(s, "omap3_uart2_iclk"),
                                  s->drq[OMAP3XXX_DMA_UART2_TX],
-                                 s->drq[OMAP3XXX_DMA_UART2_RX], 0);
+                                 s->drq[OMAP3XXX_DMA_UART2_RX],
+                                 chr_uart2);
     s->uart[2] = omap2_uart_init(omap3_l4ta_init(s->l4, L4A_UART3),
                                  s->irq[0][OMAP_INT_3XXX_UART3_IRQ],
                                  omap_findclk(s, "omap3_uart2_fclk"),
                                  omap_findclk(s, "omap3_uart3_iclk"),
                                  s->drq[OMAP3XXX_DMA_UART3_TX],
-                                 s->drq[OMAP3XXX_DMA_UART3_RX], 0);
+                                 s->drq[OMAP3XXX_DMA_UART3_RX],
+                                 chr_uart3);
     
     s->dss = omap_dss_init(s, omap3_l4ta_init(s->l4, L4A_DSS), 
                     s->irq[0][OMAP_INT_3XXX_DSS_IRQ], s->drq[OMAP24XX_DMA_DSS],