4 void cpu_save(QEMUFile *f, void *opaque)
6 CPUState *env = (CPUState *)opaque;
9 for (i = 0; i < 32; i++)
10 qemu_put_betls(f, &env->gpr[i]);
11 #if !defined(TARGET_PPC64)
12 for (i = 0; i < 32; i++)
13 qemu_put_betls(f, &env->gprh[i]);
15 qemu_put_betls(f, &env->lr);
16 qemu_put_betls(f, &env->ctr);
17 for (i = 0; i < 8; i++)
18 qemu_put_be32s(f, &env->crf[i]);
19 qemu_put_betls(f, &env->xer);
20 qemu_put_betls(f, &env->reserve);
21 qemu_put_betls(f, &env->msr);
22 for (i = 0; i < 4; i++)
23 qemu_put_betls(f, &env->tgpr[i]);
24 for (i = 0; i < 32; i++) {
30 qemu_put_be64(f, u.l);
32 qemu_put_be32s(f, &env->fpscr);
33 qemu_put_sbe32s(f, &env->access_type);
34 #if !defined(CONFIG_USER_ONLY)
35 #if defined(TARGET_PPC64)
36 qemu_put_betls(f, &env->asr);
37 qemu_put_sbe32s(f, &env->slb_nr);
39 qemu_put_betls(f, &env->sdr1);
40 for (i = 0; i < 32; i++)
41 qemu_put_betls(f, &env->sr[i]);
42 for (i = 0; i < 2; i++)
43 for (j = 0; j < 8; j++)
44 qemu_put_betls(f, &env->DBAT[i][j]);
45 for (i = 0; i < 2; i++)
46 for (j = 0; j < 8; j++)
47 qemu_put_betls(f, &env->IBAT[i][j]);
48 qemu_put_sbe32s(f, &env->nb_tlb);
49 qemu_put_sbe32s(f, &env->tlb_per_way);
50 qemu_put_sbe32s(f, &env->nb_ways);
51 qemu_put_sbe32s(f, &env->last_way);
52 qemu_put_sbe32s(f, &env->id_tlbs);
53 qemu_put_sbe32s(f, &env->nb_pids);
56 for (i = 0; i < env->nb_tlb; i++) {
57 qemu_put_betls(f, &env->tlb[i].tlb6.pte0);
58 qemu_put_betls(f, &env->tlb[i].tlb6.pte1);
59 qemu_put_betls(f, &env->tlb[i].tlb6.EPN);
62 for (i = 0; i < 4; i++)
63 qemu_put_betls(f, &env->pb[i]);
65 for (i = 0; i < 1024; i++)
66 qemu_put_betls(f, &env->spr[i]);
67 qemu_put_be32s(f, &env->vscr);
68 qemu_put_be64s(f, &env->spe_acc);
69 qemu_put_be32s(f, &env->spe_fscr);
70 qemu_put_betls(f, &env->msr_mask);
71 qemu_put_be32s(f, &env->flags);
72 qemu_put_sbe32s(f, &env->error_code);
73 qemu_put_be32s(f, &env->pending_interrupts);
74 #if !defined(CONFIG_USER_ONLY)
75 qemu_put_be32s(f, &env->irq_input_state);
76 for (i = 0; i < POWERPC_EXCP_NB; i++)
77 qemu_put_betls(f, &env->excp_vectors[i]);
78 qemu_put_betls(f, &env->excp_prefix);
79 qemu_put_betls(f, &env->hreset_excp_prefix);
80 qemu_put_betls(f, &env->ivor_mask);
81 qemu_put_betls(f, &env->ivpr_mask);
82 qemu_put_betls(f, &env->hreset_vector);
84 qemu_put_betls(f, &env->nip);
85 qemu_put_betls(f, &env->hflags);
86 qemu_put_betls(f, &env->hflags_nmsr);
87 qemu_put_sbe32s(f, &env->mmu_idx);
88 qemu_put_sbe32s(f, &env->power_mode);
91 int cpu_load(QEMUFile *f, void *opaque, int version_id)
93 CPUState *env = (CPUState *)opaque;
96 for (i = 0; i < 32; i++)
97 qemu_get_betls(f, &env->gpr[i]);
98 #if !defined(TARGET_PPC64)
99 for (i = 0; i < 32; i++)
100 qemu_get_betls(f, &env->gprh[i]);
102 qemu_get_betls(f, &env->lr);
103 qemu_get_betls(f, &env->ctr);
104 for (i = 0; i < 8; i++)
105 qemu_get_be32s(f, &env->crf[i]);
106 qemu_get_betls(f, &env->xer);
107 qemu_get_betls(f, &env->reserve);
108 qemu_get_betls(f, &env->msr);
109 for (i = 0; i < 4; i++)
110 qemu_get_betls(f, &env->tgpr[i]);
111 for (i = 0; i < 32; i++) {
116 u.l = qemu_get_be64(f);
119 qemu_get_be32s(f, &env->fpscr);
120 qemu_get_sbe32s(f, &env->access_type);
121 #if !defined(CONFIG_USER_ONLY)
122 #if defined(TARGET_PPC64)
123 qemu_get_betls(f, &env->asr);
124 qemu_get_sbe32s(f, &env->slb_nr);
126 qemu_get_betls(f, &env->sdr1);
127 for (i = 0; i < 32; i++)
128 qemu_get_betls(f, &env->sr[i]);
129 for (i = 0; i < 2; i++)
130 for (j = 0; j < 8; j++)
131 qemu_get_betls(f, &env->DBAT[i][j]);
132 for (i = 0; i < 2; i++)
133 for (j = 0; j < 8; j++)
134 qemu_get_betls(f, &env->IBAT[i][j]);
135 qemu_get_sbe32s(f, &env->nb_tlb);
136 qemu_get_sbe32s(f, &env->tlb_per_way);
137 qemu_get_sbe32s(f, &env->nb_ways);
138 qemu_get_sbe32s(f, &env->last_way);
139 qemu_get_sbe32s(f, &env->id_tlbs);
140 qemu_get_sbe32s(f, &env->nb_pids);
143 for (i = 0; i < env->nb_tlb; i++) {
144 qemu_get_betls(f, &env->tlb[i].tlb6.pte0);
145 qemu_get_betls(f, &env->tlb[i].tlb6.pte1);
146 qemu_get_betls(f, &env->tlb[i].tlb6.EPN);
149 for (i = 0; i < 4; i++)
150 qemu_get_betls(f, &env->pb[i]);
152 for (i = 0; i < 1024; i++)
153 qemu_get_betls(f, &env->spr[i]);
154 qemu_get_be32s(f, &env->vscr);
155 qemu_get_be64s(f, &env->spe_acc);
156 qemu_get_be32s(f, &env->spe_fscr);
157 qemu_get_betls(f, &env->msr_mask);
158 qemu_get_be32s(f, &env->flags);
159 qemu_get_sbe32s(f, &env->error_code);
160 qemu_get_be32s(f, &env->pending_interrupts);
161 #if !defined(CONFIG_USER_ONLY)
162 qemu_get_be32s(f, &env->irq_input_state);
163 for (i = 0; i < POWERPC_EXCP_NB; i++)
164 qemu_get_betls(f, &env->excp_vectors[i]);
165 qemu_get_betls(f, &env->excp_prefix);
166 qemu_get_betls(f, &env->hreset_excp_prefix);
167 qemu_get_betls(f, &env->ivor_mask);
168 qemu_get_betls(f, &env->ivpr_mask);
169 qemu_get_betls(f, &env->hreset_vector);
171 qemu_get_betls(f, &env->nip);
172 qemu_get_betls(f, &env->hflags);
173 qemu_get_betls(f, &env->hflags_nmsr);
174 qemu_get_sbe32s(f, &env->mmu_idx);
175 qemu_get_sbe32s(f, &env->power_mode);