2 * PXA270-based Clamshell PDA platforms.
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
7 * This code is licensed under the GNU GPL v2.
18 #include "qemu-timer.h"
23 #include "audio/audio.h"
27 #if TARGET_PHYS_ADDR_BITS == 32
28 #define REG_FMT "0x%02x"
30 #define REG_FMT "0x%02lx"
34 #define FLASH_BASE 0x0c000000
35 #define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
36 #define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
37 #define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
38 #define FLASH_ECCCNTR 0x0c /* ECC byte counter */
39 #define FLASH_ECCCLRR 0x10 /* Clear ECC */
40 #define FLASH_FLASHIO 0x14 /* Flash I/O */
41 #define FLASH_FLASHCTL 0x18 /* Flash Control */
43 #define FLASHCTL_CE0 (1 << 0)
44 #define FLASHCTL_CLE (1 << 1)
45 #define FLASHCTL_ALE (1 << 2)
46 #define FLASHCTL_WP (1 << 3)
47 #define FLASHCTL_CE1 (1 << 4)
48 #define FLASHCTL_RYBY (1 << 5)
49 #define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
57 static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
59 SLNANDState *s = (SLNANDState *) opaque;
63 #define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
65 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
66 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
68 #define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
70 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
71 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
77 return s->ecc.count & 0xff;
80 nand_getpins(s->nand, &ryby);
82 return s->ctl | FLASHCTL_RYBY;
87 return ecc_digest(&s->ecc, nand_getio(s->nand));
90 zaurus_printf("Bad register offset " REG_FMT "\n", addr);
95 static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
97 SLNANDState *s = (SLNANDState *) opaque;
99 if (addr == FLASH_FLASHIO)
100 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
101 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
103 return sl_readb(opaque, addr);
106 static void sl_writeb(void *opaque, target_phys_addr_t addr,
109 SLNANDState *s = (SLNANDState *) opaque;
113 /* Value is ignored. */
118 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
119 nand_setpins(s->nand,
120 s->ctl & FLASHCTL_CLE,
121 s->ctl & FLASHCTL_ALE,
122 s->ctl & FLASHCTL_NCE,
123 s->ctl & FLASHCTL_WP,
128 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
132 zaurus_printf("Bad register offset " REG_FMT "\n", addr);
136 static void sl_save(QEMUFile *f, void *opaque)
138 SLNANDState *s = (SLNANDState *) opaque;
140 qemu_put_8s(f, &s->ctl);
144 static int sl_load(QEMUFile *f, void *opaque, int version_id)
146 SLNANDState *s = (SLNANDState *) opaque;
148 qemu_get_8s(f, &s->ctl);
159 static void sl_flash_register(PXA2xxState *cpu, int size)
163 CPUReadMemoryFunc *sl_readfn[] = {
168 CPUWriteMemoryFunc *sl_writefn[] = {
174 s = (SLNANDState *) qemu_mallocz(sizeof(SLNANDState));
176 BlockDriverState *bdrv = NULL;
177 if (drive_get_index(IF_MTD, 0, 0) >= 0) {
178 bdrv = drives_table[drive_get_index(IF_MTD, 0, 0)].bdrv;
180 if (size == FLASH_128M)
181 s->nand = nand_init(NAND_MFR_SAMSUNG, 0x73, bdrv);
182 else if (size == FLASH_1024M)
183 s->nand = nand_init(NAND_MFR_SAMSUNG, 0xf1, bdrv);
185 iomemtype = cpu_register_io_memory(0, sl_readfn,
187 cpu_register_physical_memory(FLASH_BASE, 0x40, iomemtype);
189 register_savevm("sl_flash", 0, 0, sl_save, sl_load, s);
194 #define SPITZ_KEY_STROBE_NUM 11
195 #define SPITZ_KEY_SENSE_NUM 7
197 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
198 12, 17, 91, 34, 36, 38, 39
201 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
202 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
205 /* Eighth additional row maps the special keys */
206 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
207 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
208 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
209 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
210 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
211 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
212 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
213 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
214 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
217 #define SPITZ_GPIO_AK_INT 13 /* Remote control */
218 #define SPITZ_GPIO_SYNC 16 /* Sync button */
219 #define SPITZ_GPIO_ON_KEY 95 /* Power button */
220 #define SPITZ_GPIO_SWA 97 /* Lid */
221 #define SPITZ_GPIO_SWB 96 /* Tablet mode */
223 /* The special buttons are mapped to unused keys */
224 static const int spitz_gpiomap[5] = {
225 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
226 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
228 static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, };
231 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
235 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
236 uint16_t strobe_state;
237 uint16_t sense_state;
239 uint16_t pre_map[0x100];
243 int fifopos, fifolen;
245 } SpitzKeyboardState;
247 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
250 uint16_t strobe, sense = 0;
251 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
252 strobe = s->keyrow[i] & s->strobe_state;
255 if (!(s->sense_state & (1 << i)))
256 qemu_irq_raise(s->sense[i]);
257 } else if (s->sense_state & (1 << i))
258 qemu_irq_lower(s->sense[i]);
261 s->sense_state = sense;
264 static void spitz_keyboard_strobe(void *opaque, int line, int level)
266 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
269 s->strobe_state |= 1 << line;
271 s->strobe_state &= ~(1 << line);
272 spitz_keyboard_sense_update(s);
275 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
277 int spitz_keycode = s->keymap[keycode & 0x7f];
278 if (spitz_keycode == -1)
281 /* Handle the additional keys */
282 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
283 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^
284 spitz_gpio_invert[spitz_keycode & 0xf]);
289 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
291 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
293 spitz_keyboard_sense_update(s);
296 #define SHIFT (1 << 7)
297 #define CTRL (1 << 8)
300 #define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
302 static void spitz_keyboard_handler(SpitzKeyboardState *s, int keycode)
307 case 0x2a: /* Left Shift */
313 case 0x36: /* Right Shift */
319 case 0x1d: /* Control */
333 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
335 (keycode & ~SHIFT))];
337 if (code != mapcode) {
339 if ((code & SHIFT) && !(s->modifiers & 1))
340 QUEUE_KEY(0x2a | (keycode & 0x80));
341 if ((code & CTRL ) && !(s->modifiers & 4))
342 QUEUE_KEY(0x1d | (keycode & 0x80));
343 if ((code & FN ) && !(s->modifiers & 8))
344 QUEUE_KEY(0x38 | (keycode & 0x80));
345 if ((code & FN ) && (s->modifiers & 1))
346 QUEUE_KEY(0x2a | (~keycode & 0x80));
347 if ((code & FN ) && (s->modifiers & 2))
348 QUEUE_KEY(0x36 | (~keycode & 0x80));
350 if (keycode & 0x80) {
351 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
352 QUEUE_KEY(0x2a | 0x80);
353 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
354 QUEUE_KEY(0x1d | 0x80);
355 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
356 QUEUE_KEY(0x38 | 0x80);
357 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
359 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
363 if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
367 if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
371 if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) {
375 if ((code & FN ) && (s->modifiers & 1) &&
376 !(s->imodifiers & 0x10)) {
377 QUEUE_KEY(0x2a | 0x80);
378 s->imodifiers |= 0x10;
380 if ((code & FN ) && (s->modifiers & 2) &&
381 !(s->imodifiers & 0x20)) {
382 QUEUE_KEY(0x36 | 0x80);
383 s->imodifiers |= 0x20;
389 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
392 static void spitz_keyboard_tick(void *opaque)
394 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
397 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
399 if (s->fifopos >= 16)
403 qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) + ticks_per_sec / 32);
406 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
409 for (i = 0; i < 0x100; i ++)
411 s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */
412 s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */
413 s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */
414 s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */
415 s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */
416 s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */
417 s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */
418 s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */
419 s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */
420 s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */
421 s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */
422 s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */
423 s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */
424 s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */
425 s->pre_map[0x0d ] = 0x12 | FN; /* equal */
426 s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */
427 s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */
428 s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */
429 s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */
430 s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */
431 s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */
432 s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */
433 s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */
434 s->pre_map[0x2b ] = 0x25 | FN; /* backslash */
435 s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */
436 s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */
437 s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */
438 s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */
439 s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */
440 s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */
441 s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */
442 s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */
448 s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s);
449 spitz_keyboard_tick(s);
456 static void spitz_keyboard_save(QEMUFile *f, void *opaque)
458 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
461 qemu_put_be16s(f, &s->sense_state);
462 qemu_put_be16s(f, &s->strobe_state);
463 for (i = 0; i < 5; i ++)
464 qemu_put_byte(f, spitz_gpio_invert[i]);
467 static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id)
469 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
472 qemu_get_be16s(f, &s->sense_state);
473 qemu_get_be16s(f, &s->strobe_state);
474 for (i = 0; i < 5; i ++)
475 spitz_gpio_invert[i] = qemu_get_byte(f);
477 /* Release all pressed keys */
478 memset(s->keyrow, 0, sizeof(s->keyrow));
479 spitz_keyboard_sense_update(s);
488 static void spitz_keyboard_register(PXA2xxState *cpu)
491 SpitzKeyboardState *s;
493 s = (SpitzKeyboardState *)
494 qemu_mallocz(sizeof(SpitzKeyboardState));
495 memset(s, 0, sizeof(SpitzKeyboardState));
497 for (i = 0; i < 0x80; i ++)
499 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
500 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
501 if (spitz_keymap[i][j] != -1)
502 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
504 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
505 s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]];
507 for (i = 0; i < 5; i ++)
508 s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]];
510 s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s,
511 SPITZ_KEY_STROBE_NUM);
512 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
513 pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]);
515 spitz_keyboard_pre_map(s);
516 qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s);
518 register_savevm("spitz_keyboard", 0, 0,
519 spitz_keyboard_save, spitz_keyboard_load, s);
522 /* LCD backlight controller */
524 #define LCDTG_RESCTL 0x00
525 #define LCDTG_PHACTRL 0x01
526 #define LCDTG_DUTYCTRL 0x02
527 #define LCDTG_POWERREG0 0x03
528 #define LCDTG_POWERREG1 0x04
529 #define LCDTG_GPOR3 0x05
530 #define LCDTG_PICTRL 0x06
531 #define LCDTG_POLCTRL 0x07
539 static void spitz_bl_update(SpitzLCDTG *s)
541 if (s->bl_power && s->bl_intensity)
542 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
544 zaurus_printf("LCD Backlight now off\n");
547 /* FIXME: Implement GPIO properly and remove this hack. */
548 static SpitzLCDTG *spitz_lcdtg;
550 static inline void spitz_bl_bit5(void *opaque, int line, int level)
552 SpitzLCDTG *s = spitz_lcdtg;
553 int prev = s->bl_intensity;
556 s->bl_intensity &= ~0x20;
558 s->bl_intensity |= 0x20;
560 if (s->bl_power && prev != s->bl_intensity)
564 static inline void spitz_bl_power(void *opaque, int line, int level)
566 SpitzLCDTG *s = spitz_lcdtg;
567 s->bl_power = !!level;
571 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
573 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
581 zaurus_printf("LCD in QVGA mode\n");
583 zaurus_printf("LCD in VGA mode\n");
587 s->bl_intensity &= ~0x1f;
588 s->bl_intensity |= value;
593 case LCDTG_POWERREG0:
594 /* Set common voltage to M62332FP */
600 static void spitz_lcdtg_save(QEMUFile *f, void *opaque)
602 SpitzLCDTG *s = (SpitzLCDTG *)opaque;
603 qemu_put_be32(f, s->bl_intensity);
604 qemu_put_be32(f, s->bl_power);
607 static int spitz_lcdtg_load(QEMUFile *f, void *opaque, int version_id)
609 SpitzLCDTG *s = (SpitzLCDTG *)opaque;
610 s->bl_intensity = qemu_get_be32(f);
611 s->bl_power = qemu_get_be32(f);
615 static void spitz_lcdtg_init(SSISlave *dev)
617 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
621 s->bl_intensity = 0x20;
623 register_savevm("spitz-lcdtg", -1, 1,
624 spitz_lcdtg_save, spitz_lcdtg_load, s);
629 #define CORGI_SSP_PORT 2
631 #define SPITZ_GPIO_LCDCON_CS 53
632 #define SPITZ_GPIO_ADS7846_CS 14
633 #define SPITZ_GPIO_MAX1111_CS 20
634 #define SPITZ_GPIO_TP_INT 11
636 static DeviceState *max1111;
638 /* "Demux" the signal based on current chipselect */
645 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
647 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
650 for (i = 0; i < 3; i++) {
652 return ssi_transfer(s->bus[i], value);
658 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
660 CorgiSSPState *s = (CorgiSSPState *)opaque;
661 assert(line >= 0 && line < 3);
662 s->enable[line] = !level;
665 #define MAX1111_BATT_VOLT 1
666 #define MAX1111_BATT_TEMP 2
667 #define MAX1111_ACIN_VOLT 3
669 #define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
670 #define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
671 #define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
673 static void spitz_adc_temp_on(void *opaque, int line, int level)
679 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
681 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
684 static void spitz_ssp_save(QEMUFile *f, void *opaque)
686 CorgiSSPState *s = (CorgiSSPState *)opaque;
689 for (i = 0; i < 3; i++) {
690 qemu_put_be32(f, s->enable[i]);
694 static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id)
696 CorgiSSPState *s = (CorgiSSPState *)opaque;
699 if (version_id != 1) {
702 for (i = 0; i < 3; i++) {
703 s->enable[i] = qemu_get_be32(f);
708 static void corgi_ssp_init(SSISlave *dev)
710 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
712 qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
713 s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
714 s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
715 s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
717 register_savevm("spitz_ssp", -1, 1, spitz_ssp_save, spitz_ssp_load, s);
720 static void spitz_ssp_attach(PXA2xxState *cpu)
726 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
728 bus = qdev_get_child_bus(mux, "ssi0");
729 dev = ssi_create_slave(bus, "spitz-lcdtg");
731 bus = qdev_get_child_bus(mux, "ssi1");
732 dev = ssi_create_slave(bus, "ads7846");
733 qdev_connect_gpio_out(dev, 0,
734 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]);
736 bus = qdev_get_child_bus(mux, "ssi2");
737 max1111 = ssi_create_slave(bus, "max1111");
738 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
739 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
740 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
742 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
743 qdev_get_gpio_in(mux, 0));
744 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
745 qdev_get_gpio_in(mux, 1));
746 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
747 qdev_get_gpio_in(mux, 2));
752 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
756 BlockDriverState *bs;
758 index = drive_get_index(IF_IDE, 0, 0);
761 bs = drives_table[index].bdrv;
762 if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
763 md = dscm1xxxx_init(bs);
764 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
768 /* Wm8750 and Max7310 on I2C */
770 #define AKITA_MAX_ADDR 0x18
771 #define SPITZ_WM_ADDRL 0x1b
772 #define SPITZ_WM_ADDRH 0x1a
774 #define SPITZ_GPIO_WM 5
777 static void spitz_wm8750_addr(void *opaque, int line, int level)
779 i2c_slave *wm = (i2c_slave *) opaque;
781 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
783 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
787 static void spitz_i2c_setup(PXA2xxState *cpu)
789 /* Attach the CPU on one end of our I2C bus. */
790 i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
795 /* Attach a WM8750 to the bus */
796 wm = i2c_create_slave(bus, "wm8750", 0);
798 spitz_wm8750_addr(wm, 0, 0);
799 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM,
800 qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
801 /* .. and to the sound interface. */
802 cpu->i2s->opaque = wm;
803 cpu->i2s->codec_out = wm8750_dac_dat;
804 cpu->i2s->codec_in = wm8750_adc_dat;
805 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
809 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
811 /* Attach a Max7310 to Akita I2C bus. */
812 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
816 /* Other peripherals */
818 static void spitz_out_switch(void *opaque, int line, int level)
822 zaurus_printf("Charging %s.\n", level ? "off" : "on");
825 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
828 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
831 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
834 spitz_bl_bit5(opaque, line, level);
837 spitz_bl_power(opaque, line, level);
840 spitz_adc_temp_on(opaque, line, level);
845 #define SPITZ_SCP_LED_GREEN 1
846 #define SPITZ_SCP_JK_B 2
847 #define SPITZ_SCP_CHRG_ON 3
848 #define SPITZ_SCP_MUTE_L 4
849 #define SPITZ_SCP_MUTE_R 5
850 #define SPITZ_SCP_CF_POWER 6
851 #define SPITZ_SCP_LED_ORANGE 7
852 #define SPITZ_SCP_JK_A 8
853 #define SPITZ_SCP_ADC_TEMP_ON 9
854 #define SPITZ_SCP2_IR_ON 1
855 #define SPITZ_SCP2_AKIN_PULLUP 2
856 #define SPITZ_SCP2_BACKLIGHT_CONT 7
857 #define SPITZ_SCP2_BACKLIGHT_ON 8
858 #define SPITZ_SCP2_MIC_BIAS 9
860 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
861 ScoopInfo *scp0, ScoopInfo *scp1)
863 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
865 scoop_gpio_out_set(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
866 scoop_gpio_out_set(scp0, SPITZ_SCP_JK_B, outsignals[1]);
867 scoop_gpio_out_set(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
868 scoop_gpio_out_set(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
871 scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
872 scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
875 scoop_gpio_out_set(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
878 #define SPITZ_GPIO_HSYNC 22
879 #define SPITZ_GPIO_SD_DETECT 9
880 #define SPITZ_GPIO_SD_WP 81
881 #define SPITZ_GPIO_ON_RESET 89
882 #define SPITZ_GPIO_BAT_COVER 90
883 #define SPITZ_GPIO_CF1_IRQ 105
884 #define SPITZ_GPIO_CF1_CD 94
885 #define SPITZ_GPIO_CF2_IRQ 106
886 #define SPITZ_GPIO_CF2_CD 93
888 static int spitz_hsync;
890 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
892 PXA2xxState *cpu = (PXA2xxState *) opaque;
893 qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync);
897 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
901 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
902 * read to satisfy broken guests that poll-wait for hsync.
903 * Simulating a real hsync event would be less practical and
904 * wouldn't guarantee that a guest ever exits the loop.
907 lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
908 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
909 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
912 pxa2xx_mmci_handlers(cpu->mmc,
913 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP],
914 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]);
916 /* Battery lock always closed */
917 qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);
920 pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
922 /* PCMCIA signals: card's IRQ and Card-Detect */
924 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
925 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ],
926 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]);
928 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
929 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ],
930 pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]);
932 /* Initialise the screen rotation related signals */
933 spitz_gpio_invert[3] = 0; /* Always open */
934 if (graphic_rotate) { /* Tablet mode */
935 spitz_gpio_invert[4] = 0;
936 } else { /* Portrait mode */
937 spitz_gpio_invert[4] = 1;
939 qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA],
940 spitz_gpio_invert[3]);
941 qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB],
942 spitz_gpio_invert[4]);
946 enum spitz_model_e { spitz, akita, borzoi, terrier };
948 #define SPITZ_RAM 0x04000000
949 #define SPITZ_ROM 0x00800000
951 static struct arm_boot_info spitz_binfo = {
952 .loader_start = PXA2XX_SDRAM_BASE,
953 .ram_size = 0x04000000,
956 static void spitz_common_init(ram_addr_t ram_size,
957 const char *kernel_filename,
958 const char *kernel_cmdline, const char *initrd_filename,
959 const char *cpu_model, enum spitz_model_e model, int arm_id)
962 ScoopInfo *scp0, *scp1 = NULL;
965 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
967 /* Setup CPU & memory */
968 cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
970 sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
972 cpu_register_physical_memory(0, SPITZ_ROM,
973 qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM);
975 /* Setup peripherals */
976 spitz_keyboard_register(cpu);
978 spitz_ssp_attach(cpu);
980 scp0 = scoop_init(cpu, 0, 0x10800000);
981 if (model != akita) {
982 scp1 = scoop_init(cpu, 1, 0x08800040);
985 spitz_scoop_gpio_setup(cpu, scp0, scp1);
987 spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
989 spitz_i2c_setup(cpu);
992 spitz_akita_i2c_setup(cpu);
994 if (model == terrier)
995 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
996 spitz_microdrive_attach(cpu, 1);
997 else if (model != akita)
998 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
999 spitz_microdrive_attach(cpu, 0);
1001 /* Setup initial (reset) machine state */
1002 cpu->env->regs[15] = spitz_binfo.loader_start;
1004 spitz_binfo.kernel_filename = kernel_filename;
1005 spitz_binfo.kernel_cmdline = kernel_cmdline;
1006 spitz_binfo.initrd_filename = initrd_filename;
1007 spitz_binfo.board_id = arm_id;
1008 arm_load_kernel(cpu->env, &spitz_binfo);
1009 sl_bootparam_write(SL_PXA_PARAM_BASE);
1012 static void spitz_init(ram_addr_t ram_size,
1013 const char *boot_device,
1014 const char *kernel_filename, const char *kernel_cmdline,
1015 const char *initrd_filename, const char *cpu_model)
1017 spitz_common_init(ram_size, kernel_filename,
1018 kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
1021 static void borzoi_init(ram_addr_t ram_size,
1022 const char *boot_device,
1023 const char *kernel_filename, const char *kernel_cmdline,
1024 const char *initrd_filename, const char *cpu_model)
1026 spitz_common_init(ram_size, kernel_filename,
1027 kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
1030 static void akita_init(ram_addr_t ram_size,
1031 const char *boot_device,
1032 const char *kernel_filename, const char *kernel_cmdline,
1033 const char *initrd_filename, const char *cpu_model)
1035 spitz_common_init(ram_size, kernel_filename,
1036 kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
1039 static void terrier_init(ram_addr_t ram_size,
1040 const char *boot_device,
1041 const char *kernel_filename, const char *kernel_cmdline,
1042 const char *initrd_filename, const char *cpu_model)
1044 spitz_common_init(ram_size, kernel_filename,
1045 kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
1048 QEMUMachine akitapda_machine = {
1050 .desc = "Akita PDA (PXA270)",
1054 static QEMUMachine spitzpda_machine = {
1056 .desc = "Spitz PDA (PXA270)",
1060 static QEMUMachine borzoipda_machine = {
1062 .desc = "Borzoi PDA (PXA270)",
1063 .init = borzoi_init,
1066 static QEMUMachine terrierpda_machine = {
1068 .desc = "Terrier PDA (PXA270)",
1069 .init = terrier_init,
1072 static void spitz_machine_init(void)
1074 qemu_register_machine(&akitapda_machine);
1075 qemu_register_machine(&spitzpda_machine);
1076 qemu_register_machine(&borzoipda_machine);
1077 qemu_register_machine(&terrierpda_machine);
1080 machine_init(spitz_machine_init);
1082 static SSISlaveInfo corgi_ssp_info = {
1083 .init = corgi_ssp_init,
1084 .transfer = corgi_ssp_transfer
1087 static SSISlaveInfo spitz_lcdtg_info = {
1088 .init = spitz_lcdtg_init,
1089 .transfer = spitz_lcdtg_transfer
1092 static void spitz_register_devices(void)
1094 ssi_register_slave("corgi-ssp", sizeof(CorgiSSPState), &corgi_ssp_info);
1095 ssi_register_slave("spitz-lcdtg", sizeof(SpitzLCDTG), &spitz_lcdtg_info);
1098 device_init(spitz_register_devices)