2 * Flash NAND memory emulation. Based on "16M x 8 Bit NAND Flash
3 * Memory" datasheet for the KM29U128AT / K9F2808U0A chips from
6 * Copyright (c) 2006 Openedhand Ltd.
7 * Written by Andrzej Zaborowski <balrog@zabor.org>
9 * Support for additional features based on "MT29F2G16ABCWP 2Gx16"
10 * datasheet from Micron Technology and "NAND02G-B2C" datasheet
11 * from ST Microelectronics.
13 * This code is licensed under the GNU GPL v2.
22 # define NAND_CMD_READ0 0x00
23 # define NAND_CMD_READ1 0x01
24 # define NAND_CMD_READ2 0x50
25 # define NAND_CMD_LPREAD2 0x30
26 # define NAND_CMD_READCACHESTART 0x31
27 # define NAND_CMD_READCACHEEXIT 0x34
28 # define NAND_CMD_READCACHELAST 0x3f
29 # define NAND_CMD_NOSERIALREAD2 0x35
30 # define NAND_CMD_RANDOMREAD1 0x05
31 # define NAND_CMD_RANDOMREAD2 0xe0
32 # define NAND_CMD_READID 0x90
33 # define NAND_CMD_RESET 0xff
34 # define NAND_CMD_PAGEPROGRAM1 0x80
35 # define NAND_CMD_PAGEPROGRAM2 0x10
36 # define NAND_CMD_CACHEPROGRAM2 0x15
37 # define NAND_CMD_BLOCKERASE1 0x60
38 # define NAND_CMD_BLOCKERASE2 0xd0
39 # define NAND_CMD_READSTATUS 0x70
40 # define NAND_CMD_COPYBACKPRG1 0x85
42 # define NAND_IOSTATUS_ERROR (1 << 0)
43 # define NAND_IOSTATUS_PLANE0 (1 << 1)
44 # define NAND_IOSTATUS_PLANE1 (1 << 2)
45 # define NAND_IOSTATUS_PLANE2 (1 << 3)
46 # define NAND_IOSTATUS_PLANE3 (1 << 4)
47 # define NAND_IOSTATUS_READY (3 << 5)
48 # define NAND_IOSTATUS_UNPROTCT (1 << 7)
50 # define MAX_PAGE 0x800
53 struct NANDFlashState {
54 uint8_t manf_id, chip_id;
55 uint8_t buswidth; /* in BYTES */
57 int page_shift, oob_shift, erase_shift, addr_shift;
59 BlockDriverState *bdrv;
62 int cle, ale, ce, wp, gnd;
64 uint8_t io[MAX_PAGE + MAX_OOB + 0x400];
74 void (*blk_write)(NANDFlashState *s);
75 void (*blk_erase)(NANDFlashState *s);
76 void (*blk_load)(NANDFlashState *s, uint64_t addr, int offset);
79 # define NAND_NO_AUTOINCR 0x00000001
80 # define NAND_BUSWIDTH_16 0x00000002
81 # define NAND_NO_PADDING 0x00000004
82 # define NAND_CACHEPRG 0x00000008
83 # define NAND_COPYBACK 0x00000010
84 # define NAND_IS_AND 0x00000020
85 # define NAND_4PAGE_ARRAY 0x00000040
86 # define NAND_NO_READRDY 0x00000100
87 # define NAND_SAMSUNG_LP (NAND_NO_PADDING | NAND_COPYBACK)
91 # define PAGE(addr) ((addr) >> ADDR_SHIFT)
92 # define PAGE_START(page) (PAGE(page) * (PAGE_SIZE + OOB_SIZE))
93 # define PAGE_MASK ((1 << ADDR_SHIFT) - 1)
94 # define OOB_SHIFT (PAGE_SHIFT - 5)
95 # define OOB_SIZE (1 << OOB_SHIFT)
96 # define SECTOR(addr) ((addr) >> (9 + ADDR_SHIFT - PAGE_SHIFT))
97 # define SECTOR_OFFSET(addr) ((addr) & ((511 >> PAGE_SHIFT) << 8))
99 # define PAGE_SIZE 256
100 # define PAGE_SHIFT 8
101 # define PAGE_SECTORS 1
102 # define ADDR_SHIFT 8
104 # define PAGE_SIZE 512
105 # define PAGE_SHIFT 9
106 # define PAGE_SECTORS 1
107 # define ADDR_SHIFT 8
109 # define PAGE_SIZE 2048
110 # define PAGE_SHIFT 11
111 # define PAGE_SECTORS 4
112 # define ADDR_SHIFT 16
115 /* Information based on Linux drivers/mtd/nand/nand_ids.c */
116 static const struct {
122 } nand_flash_ids[0x100] = {
123 [0 ... 0xff] = { 0 },
125 [0x6e] = { 1, 8, 8, 4, 0 },
126 [0x64] = { 2, 8, 8, 4, 0 },
127 [0x6b] = { 4, 8, 9, 4, 0 },
128 [0xe8] = { 1, 8, 8, 4, 0 },
129 [0xec] = { 1, 8, 8, 4, 0 },
130 [0xea] = { 2, 8, 8, 4, 0 },
131 [0xd5] = { 4, 8, 9, 4, 0 },
132 [0xe3] = { 4, 8, 9, 4, 0 },
133 [0xe5] = { 4, 8, 9, 4, 0 },
134 [0xd6] = { 8, 8, 9, 4, 0 },
136 [0x39] = { 8, 8, 9, 4, 0 },
137 [0xe6] = { 8, 8, 9, 4, 0 },
138 [0x49] = { 8, 16, 9, 4, NAND_BUSWIDTH_16 },
139 [0x59] = { 8, 16, 9, 4, NAND_BUSWIDTH_16 },
141 [0x33] = { 16, 8, 9, 5, 0 },
142 [0x73] = { 16, 8, 9, 5, 0 },
143 [0x43] = { 16, 16, 9, 5, NAND_BUSWIDTH_16 },
144 [0x53] = { 16, 16, 9, 5, NAND_BUSWIDTH_16 },
146 [0x35] = { 32, 8, 9, 5, 0 },
147 [0x75] = { 32, 8, 9, 5, 0 },
148 [0x45] = { 32, 16, 9, 5, NAND_BUSWIDTH_16 },
149 [0x55] = { 32, 16, 9, 5, NAND_BUSWIDTH_16 },
151 [0x36] = { 64, 8, 9, 5, 0 },
152 [0x76] = { 64, 8, 9, 5, 0 },
153 [0x46] = { 64, 16, 9, 5, NAND_BUSWIDTH_16 },
154 [0x56] = { 64, 16, 9, 5, NAND_BUSWIDTH_16 },
156 [0x78] = { 128, 8, 9, 5, 0 },
157 [0x39] = { 128, 8, 9, 5, 0 },
158 [0x79] = { 128, 8, 9, 5, 0 },
159 [0x72] = { 128, 16, 9, 5, NAND_BUSWIDTH_16 },
160 [0x49] = { 128, 16, 9, 5, NAND_BUSWIDTH_16 },
161 [0x74] = { 128, 16, 9, 5, NAND_BUSWIDTH_16 },
162 [0x59] = { 128, 16, 9, 5, NAND_BUSWIDTH_16 },
164 [0x71] = { 256, 8, 9, 5, 0 },
167 * These are the new chips with large page size. The pagesize and the
168 * erasesize is determined from the extended id bytes
170 # define LP_OPTIONS (NAND_SAMSUNG_LP | NAND_NO_READRDY | NAND_NO_AUTOINCR)
171 # define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
174 [0xa2] = { 64, 8, 0, 0, LP_OPTIONS },
175 [0xf2] = { 64, 8, 0, 0, LP_OPTIONS },
176 [0xb2] = { 64, 16, 0, 0, LP_OPTIONS16 },
177 [0xc2] = { 64, 16, 0, 0, LP_OPTIONS16 },
180 [0xa1] = { 128, 8, 0, 0, LP_OPTIONS },
181 [0xf1] = { 128, 8, 0, 0, LP_OPTIONS },
182 [0xb1] = { 128, 16, 0, 0, LP_OPTIONS16 },
183 [0xc1] = { 128, 16, 0, 0, LP_OPTIONS16 },
186 [0xaa] = { 256, 8, 0, 0, LP_OPTIONS },
187 [0xda] = { 256, 8, 0, 0, LP_OPTIONS },
188 [0xba] = { 256, 16, 0, 0, LP_OPTIONS16 },
189 [0xca] = { 256, 16, 0, 0, LP_OPTIONS16 },
192 [0xac] = { 512, 8, 0, 0, LP_OPTIONS },
193 [0xdc] = { 512, 8, 0, 0, LP_OPTIONS },
194 [0xbc] = { 512, 16, 0, 0, LP_OPTIONS16 },
195 [0xcc] = { 512, 16, 0, 0, LP_OPTIONS16 },
198 [0xa3] = { 1024, 8, 0, 0, LP_OPTIONS },
199 [0xd3] = { 1024, 8, 0, 0, LP_OPTIONS },
200 [0xb3] = { 1024, 16, 0, 0, LP_OPTIONS16 },
201 [0xc3] = { 1024, 16, 0, 0, LP_OPTIONS16 },
204 [0xa5] = { 2048, 8, 0, 0, LP_OPTIONS },
205 [0xd5] = { 2048, 8, 0, 0, LP_OPTIONS },
206 [0xb5] = { 2048, 16, 0, 0, LP_OPTIONS16 },
207 [0xc5] = { 2048, 16, 0, 0, LP_OPTIONS16 },
210 static void nand_reset(NANDFlashState *s)
212 s->cmd = NAND_CMD_READ0;
217 s->status &= NAND_IOSTATUS_UNPROTCT;
218 s->status |= NAND_IOSTATUS_READY;
221 static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value)
223 s->ioaddr[s->iolen++] = value;
224 for (value = s->buswidth; --value;)
225 s->ioaddr[s->iolen++] = 0;
228 static void nand_command(NANDFlashState *s)
232 case NAND_CMD_READCACHEEXIT:
236 case NAND_CMD_READID:
239 nand_pushio_byte(s, s->manf_id);
240 nand_pushio_byte(s, s->chip_id);
241 nand_pushio_byte(s, 'Q'); /* Don't-case byte (often 0xa5) */
242 if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
243 nand_pushio_byte(s, (s->buswidth == 2) ? 0x55 : 0x15);
245 nand_pushio_byte(s, 0xc0); /* Multi-plane */
248 case NAND_CMD_RANDOMREAD2:
249 case NAND_CMD_NOSERIALREAD2:
250 if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP))
253 s->blk_load(s, s->addr, (int)(s->addr & ((1 << s->addr_shift) - 1)));
260 case NAND_CMD_PAGEPROGRAM1:
265 case NAND_CMD_PAGEPROGRAM2:
271 case NAND_CMD_BLOCKERASE1:
274 case NAND_CMD_BLOCKERASE2:
275 if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
285 case NAND_CMD_READSTATUS:
288 nand_pushio_byte(s, s->status);
292 printf("%s: Unknown NAND command 0x%02x\n", __FUNCTION__, s->cmd);
296 static void nand_save(QEMUFile *f, void *opaque)
298 NANDFlashState *s = (NANDFlashState *) opaque;
299 qemu_put_byte(f, s->cle);
300 qemu_put_byte(f, s->ale);
301 qemu_put_byte(f, s->ce);
302 qemu_put_byte(f, s->wp);
303 qemu_put_byte(f, s->gnd);
304 qemu_put_buffer(f, s->io, sizeof(s->io));
305 qemu_put_be32(f, s->ioaddr - s->io);
306 qemu_put_be32(f, s->iolen);
308 qemu_put_be32s(f, &s->cmd);
309 qemu_put_be64s(f, &s->addr);
310 qemu_put_be32(f, s->addrlen);
311 qemu_put_be32(f, s->status);
312 qemu_put_be32(f, s->offset);
313 /* XXX: do we want to save s->storage too? */
316 static int nand_load(QEMUFile *f, void *opaque, int version_id)
318 NANDFlashState *s = (NANDFlashState *) opaque;
319 s->cle = qemu_get_byte(f);
320 s->ale = qemu_get_byte(f);
321 s->ce = qemu_get_byte(f);
322 s->wp = qemu_get_byte(f);
323 s->gnd = qemu_get_byte(f);
324 qemu_get_buffer(f, s->io, sizeof(s->io));
325 s->ioaddr = s->io + qemu_get_be32(f);
326 s->iolen = qemu_get_be32(f);
327 if (s->ioaddr >= s->io + sizeof(s->io) || s->ioaddr < s->io)
330 qemu_get_be32s(f, &s->cmd);
331 qemu_get_be64s(f, &s->addr);
332 s->addrlen = qemu_get_be32(f);
333 s->status = qemu_get_be32(f);
334 s->offset = qemu_get_be32(f);
339 * Chip inputs are CLE, ALE, CE, WP, GND and eight I/O pins. Chip
340 * outputs are R/B and eight I/O pins.
342 * CE, WP and R/B are active low.
344 void nand_setpins(NANDFlashState *s,
345 int cle, int ale, int ce, int wp, int gnd)
353 s->status |= NAND_IOSTATUS_UNPROTCT;
355 s->status &= ~NAND_IOSTATUS_UNPROTCT;
358 void nand_getpins(NANDFlashState *s, int *rb)
363 void nand_setio(NANDFlashState *s, uint32_t value)
367 if (!s->ce && s->cle) {
368 if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) {
369 if (s->cmd == NAND_CMD_READ0
370 && (value == NAND_CMD_LPREAD2
371 || value == NAND_CMD_READCACHESTART
372 || value == NAND_CMD_READCACHELAST))
374 if (value == NAND_CMD_RANDOMREAD1) {
375 s->addr &= ~((1 << s->addr_shift) - 1);
380 if (value == NAND_CMD_READ0)
382 else if (value == NAND_CMD_READ1) {
384 value = NAND_CMD_READ0;
386 else if (value == NAND_CMD_READ2) {
387 s->offset = 1 << s->page_shift;
388 value = NAND_CMD_READ0;
393 if (s->cmd == NAND_CMD_READSTATUS ||
394 s->cmd == NAND_CMD_PAGEPROGRAM2 ||
395 s->cmd == NAND_CMD_BLOCKERASE1 ||
396 s->cmd == NAND_CMD_BLOCKERASE2 ||
397 s->cmd == NAND_CMD_NOSERIALREAD2 ||
398 s->cmd == NAND_CMD_RANDOMREAD2 ||
399 s->cmd == NAND_CMD_RESET ||
400 s->cmd == NAND_CMD_READCACHEEXIT)
403 if (s->cmd != NAND_CMD_RANDOMREAD2) {
410 s->addr |= value << (s->addrlen * 8);
413 switch (s->addrlen) {
415 if (s->cmd == NAND_CMD_READID)
418 case 2: /* fix cache address as a byte address */
419 s->addr <<= (s->buswidth - 1);
422 if (!(nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
423 && (s->cmd == NAND_CMD_READ0
424 || s->cmd == NAND_CMD_PAGEPROGRAM1))
428 if ((nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
429 && nand_flash_ids[s->chip_id].size < 256 /* 1Gb or less */
430 && (s->cmd == NAND_CMD_READ0 ||
431 s->cmd == NAND_CMD_PAGEPROGRAM1))
435 if ((nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP)
436 && nand_flash_ids[s->chip_id].size >= 256 /* 2Gb or more */
437 && (s->cmd == NAND_CMD_READ0 ||
438 s->cmd == NAND_CMD_PAGEPROGRAM1))
446 if (!s->cle && !s->ale && s->cmd == NAND_CMD_PAGEPROGRAM1) {
447 if (s->iolen < (1 << s->page_shift) + (1 << s->oob_shift))
448 for (i = s->buswidth; i--; value >>= 8)
449 s->io[s->iolen++] = (uint8_t)(value & 0xff);
450 } else if (!s->cle && !s->ale && s->cmd == NAND_CMD_COPYBACKPRG1) {
451 if ((s->addr & ((1 << s->addr_shift) - 1)) <
452 (1 << s->page_shift) + (1 << s->oob_shift))
453 for (i = s->buswidth; i--; s->addr++, value >>= 8)
454 s->io[s->iolen + (s->addr & ((1 << s->addr_shift) - 1))] =
455 (uint8_t)(value & 0xff);
459 uint32_t nand_getio(NANDFlashState *s)
464 /* Allow sequential reading */
465 if (!s->iolen && s->cmd == NAND_CMD_READ0) {
466 offset = (int)((s->addr & ((1 << s->addr_shift) - 1))) + s->offset;
469 s->blk_load(s, s->addr, offset);
471 s->iolen = (1 << s->page_shift) - offset;
473 s->iolen = (1 << s->page_shift) + (1 << s->oob_shift) - offset;
476 if (s->ce || s->iolen <= 0)
479 for (offset = s->buswidth; offset--;)
480 x |= s->ioaddr[offset] << (offset << 3);
481 /* after receiving READ STATUS command all subsequent reads will
482 return the status register value until another command is issued */
483 if (s->cmd != NAND_CMD_READSTATUS) {
484 s->ioaddr += s->buswidth;
485 s->iolen -= s->buswidth;
490 uint32_t nand_getbuswidth(NANDFlashState *s)
494 return (s->buswidth << 3);
497 NANDFlashState *nand_init(int manf_id, int chip_id, BlockDriverState *bdrv)
502 if (nand_flash_ids[chip_id].size == 0) {
503 hw_error("%s: Unsupported NAND chip ID.\n", __FUNCTION__);
506 s = (NANDFlashState *) qemu_mallocz(sizeof(NANDFlashState));
508 s->manf_id = manf_id;
509 s->chip_id = chip_id;
510 s->buswidth = (uint8_t)(nand_flash_ids[s->chip_id].width >> 3);
511 s->size = nand_flash_ids[s->chip_id].size << 20;
512 if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) {
516 s->page_shift = nand_flash_ids[s->chip_id].page_shift;
517 s->erase_shift = nand_flash_ids[s->chip_id].erase_shift;
520 switch (1 << s->page_shift) {
531 hw_error("%s: Unsupported NAND block size.\n", __FUNCTION__);
534 pagesize = 1 << s->oob_shift;
536 if (s->bdrv && bdrv_getlength(s->bdrv) >=
537 (s->pages << s->page_shift) + (s->pages << s->oob_shift)) {
543 pagesize += 1 << s->page_shift;
545 s->storage = (uint8_t *) memset(qemu_malloc(s->pages * pagesize),
546 0xff, s->pages * pagesize);
547 /* Give s->ioaddr a sane value in case we save state before it
551 register_savevm("nand", -1, 0, nand_save, nand_load, s);
556 void nand_done(NANDFlashState *s)
560 bdrv_delete(s->bdrv);
563 if (!s->bdrv || s->mem_oob)
571 /* Program a single page */
572 static void glue(nand_blk_write_, PAGE_SIZE)(NANDFlashState *s)
574 uint64_t off, page, sector, soff;
575 uint8_t iobuf[(PAGE_SECTORS + 2) * 0x200];
576 if (PAGE(s->addr) >= s->pages)
580 uint8_t *p = s->storage + PAGE_START(s->addr) + (s->addr & PAGE_MASK) +
583 for (i = 0; i < s->iolen; i++) {
586 } else if (s->mem_oob) {
587 sector = SECTOR(s->addr);
588 off = (s->addr & PAGE_MASK) + s->offset;
589 soff = SECTOR_OFFSET(s->addr);
590 if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS) == -1) {
591 printf("%s: read error in sector %lli\n", __FUNCTION__, sector);
595 uint8_t *p = iobuf + (soff | off);
596 int i, count = MIN(s->iolen, PAGE_SIZE - off);
597 for (i = 0; i < count; i++) {
600 if (off + s->iolen > PAGE_SIZE) {
601 page = PAGE(s->addr);
602 p = s->storage + (page << OOB_SHIFT);
603 uint8_t *q = s->io + PAGE_SIZE - off;
604 count = MIN(OOB_SIZE, off + s->iolen - PAGE_SIZE);
605 for (i = 0; i < count; i++) {
610 if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS) == -1)
611 printf("%s: write error in sector %lli\n", __FUNCTION__, sector);
613 off = PAGE_START(s->addr) + (s->addr & PAGE_MASK) + s->offset;
616 if (bdrv_read(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) == -1) {
617 printf("%s: read error in sector %lli\n", __FUNCTION__, sector);
621 uint8_t *p = iobuf + soff;
623 for (i = 0; i < s->iolen; i++) {
627 if (bdrv_write(s->bdrv, sector, iobuf, PAGE_SECTORS + 2) == -1)
628 printf("%s: write error in sector %lli\n", __FUNCTION__, sector);
633 /* Erase a single block */
634 static void glue(nand_blk_erase_, PAGE_SIZE)(NANDFlashState *s)
636 uint64_t i, page, addr;
637 uint8_t iobuf[0x200] = { [0 ... 0x1ff] = 0xff, };
638 addr = s->addr & ~((1 << (ADDR_SHIFT + s->erase_shift)) - 1);
640 if (PAGE(addr) >= s->pages)
644 memset(s->storage + PAGE_START(addr),
645 0xff, (PAGE_SIZE + OOB_SIZE) << s->erase_shift);
646 } else if (s->mem_oob) {
647 memset(s->storage + (PAGE(addr) << OOB_SHIFT),
648 0xff, OOB_SIZE << s->erase_shift);
650 page = SECTOR(addr + (ADDR_SHIFT + s->erase_shift));
651 for (; i < page; i ++)
652 if (bdrv_write(s->bdrv, i, iobuf, 1) == -1)
653 printf("%s: write error in sector %lli\n", __FUNCTION__, i);
655 addr = PAGE_START(addr);
657 if (bdrv_read(s->bdrv, page, iobuf, 1) == -1)
658 printf("%s: read error in sector %lli\n", __FUNCTION__, page);
659 memset(iobuf + (addr & 0x1ff), 0xff, (~addr & 0x1ff) + 1);
660 if (bdrv_write(s->bdrv, page, iobuf, 1) == -1)
661 printf("%s: write error in sector %lli\n", __FUNCTION__, page);
663 memset(iobuf, 0xff, 0x200);
664 i = (addr & ~0x1ff) + 0x200;
665 for (addr += ((PAGE_SIZE + OOB_SIZE) << s->erase_shift) - 0x200;
666 i < addr; i += 0x200)
667 if (bdrv_write(s->bdrv, i >> 9, iobuf, 1) == -1)
668 printf("%s: write error in sector %lli\n", __FUNCTION__, i >> 9);
671 if (bdrv_read(s->bdrv, page, iobuf, 1) == -1)
672 printf("%s: read error in sector %lli\n", __FUNCTION__, page);
673 memset(iobuf, 0xff, ((addr - 1) & 0x1ff) + 1);
674 if (bdrv_write(s->bdrv, page, iobuf, 1) == -1)
675 printf("%s: write error in sector %lli\n", __FUNCTION__, page);
679 static void glue(nand_blk_load_, PAGE_SIZE)(NANDFlashState *s,
680 uint64_t addr, int offset)
682 if (PAGE(addr) >= s->pages)
687 if (bdrv_read(s->bdrv, SECTOR(addr), s->io, PAGE_SECTORS) == -1)
688 printf("%s: read error in sector %lli\n",
689 __FUNCTION__, SECTOR(addr));
690 memcpy(s->io + SECTOR_OFFSET(s->addr) + PAGE_SIZE,
691 s->storage + (PAGE(s->addr) << OOB_SHIFT),
693 s->ioaddr = s->io + SECTOR_OFFSET(s->addr) + offset;
695 if (bdrv_read(s->bdrv, PAGE_START(addr) >> 9,
696 s->io, (PAGE_SECTORS + 2)) == -1)
697 printf("%s: read error in sector %lli\n",
698 __FUNCTION__, PAGE_START(addr) >> 9);
699 s->ioaddr = s->io + (PAGE_START(addr) & 0x1ff) + offset;
702 memcpy(s->io, s->storage + PAGE_START(s->addr) +
703 offset, PAGE_SIZE + OOB_SIZE - offset);
707 s->addr &= PAGE_SIZE - 1;
708 s->addr += PAGE_SIZE;
711 static void glue(nand_init_, PAGE_SIZE)(NANDFlashState *s)
713 s->oob_shift = PAGE_SHIFT - 5;
714 s->pages = s->size >> PAGE_SHIFT;
715 s->addr_shift = ADDR_SHIFT;
717 s->blk_erase = glue(nand_blk_erase_, PAGE_SIZE);
718 s->blk_write = glue(nand_blk_write_, PAGE_SIZE);
719 s->blk_load = glue(nand_blk_load_, PAGE_SIZE);