4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #ifdef CONFIG_USER_ONLY
35 #include "qemu_socket.h"
37 /* XXX: these constants may be independent of the host ones even for Unix */
57 typedef struct GDBState {
58 CPUState *env; /* current CPU */
59 enum RSState state; /* parsing state */
63 char last_packet[4100];
65 #ifdef CONFIG_USER_ONLY
73 #ifdef CONFIG_USER_ONLY
74 /* XXX: This is not thread safe. Do we care? */
75 static int gdbserver_fd = -1;
77 /* XXX: remove this hack. */
78 static GDBState gdbserver_state;
80 static int get_char(GDBState *s)
86 ret = recv(s->fd, &ch, 1, 0);
88 if (errno != EINTR && errno != EAGAIN)
90 } else if (ret == 0) {
100 /* GDB stub state for use by semihosting syscalls. */
101 static GDBState *gdb_syscall_state;
102 static gdb_syscall_complete_cb gdb_current_syscall_cb;
110 /* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112 int use_gdb_syscalls(void)
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
121 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
123 #ifdef CONFIG_USER_ONLY
127 ret = send(s->fd, buf, len, 0);
129 if (errno != EINTR && errno != EAGAIN)
137 qemu_chr_write(s->chr, buf, len);
141 static inline int fromhex(int v)
143 if (v >= '0' && v <= '9')
145 else if (v >= 'A' && v <= 'F')
147 else if (v >= 'a' && v <= 'f')
153 static inline int tohex(int v)
161 static void memtohex(char *buf, const uint8_t *mem, int len)
166 for(i = 0; i < len; i++) {
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
174 static void hextomem(uint8_t *mem, const char *buf, int len)
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
184 /* return -1 if error, 0 if OK */
185 static int put_packet(GDBState *s, char *buf)
191 printf("reply='%s'\n", buf);
201 for(i = 0; i < len; i++) {
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
211 #ifdef CONFIG_USER_ONLY
224 #if defined(TARGET_I386)
226 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
228 uint32_t *registers = (uint32_t *)mem_buf;
231 for(i = 0; i < 8; i++) {
232 registers[i] = env->regs[i];
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
246 registers[36] = env->fpuc;
247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
256 for(i = 0; i < 16; i++)
257 tswapls(®isters[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(®isters[i]);
263 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
265 uint32_t *registers = (uint32_t *)mem_buf;
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
273 #if defined(CONFIG_USER_ONLY)
274 #define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
286 #elif defined (TARGET_PPC)
287 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
293 for(i = 0; i < 32; i++) {
294 registers[i] = tswapl(env->gpr[i]);
297 for (i = 0; i < 32; i++) {
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
302 registers[96] = tswapl(env->nip);
303 registers[97] = tswapl(do_load_msr(env));
305 for (i = 0; i < 8; i++)
306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
310 registers[101] = tswapl(ppc_load_xer(env));
316 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
318 uint32_t *registers = (uint32_t *)mem_buf;
322 for (i = 0; i < 32; i++) {
323 env->gpr[i] = tswapl(registers[i]);
326 for (i = 0; i < 32; i++) {
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
331 env->nip = tswapl(registers[96]);
332 do_store_msr(env, tswapl(registers[97]));
333 registers[98] = tswapl(registers[98]);
334 for (i = 0; i < 8; i++)
335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
338 ppc_store_xer(env, tswapl(registers[101]));
340 #elif defined (TARGET_SPARC)
341 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
343 target_ulong *registers = (target_ulong *)mem_buf;
347 for(i = 0; i < 8; i++) {
348 registers[i] = tswapl(env->gregs[i]);
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
354 #ifndef TARGET_SPARC64
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
365 registers[65] = tswapl(tmp);
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
374 return 73 * sizeof(target_ulong);
377 for (i = 0; i < 64; i += 2) {
380 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
381 tmp |= *(uint32_t *)&env->fpr[i + 1];
382 registers[i / 2 + 32] = tswap64(tmp);
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
386 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
387 ((env->asi & 0xff) << 24) |
388 ((env->pstate & 0xfff) << 8) |
390 registers[67] = tswapl(env->fsr);
391 registers[68] = tswapl(env->fprs);
392 registers[69] = tswapl(env->y);
393 return 70 * sizeof(target_ulong);
397 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
399 target_ulong *registers = (target_ulong *)mem_buf;
403 for(i = 0; i < 7; i++) {
404 env->gregs[i] = tswapl(registers[i]);
406 /* fill in register window */
407 for(i = 0; i < 24; i++) {
408 env->regwptr[i] = tswapl(registers[i + 8]);
410 #ifndef TARGET_SPARC64
412 for (i = 0; i < 32; i++) {
413 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
415 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
416 env->y = tswapl(registers[64]);
417 PUT_PSR(env, tswapl(registers[65]));
418 env->wim = tswapl(registers[66]);
419 env->tbr = tswapl(registers[67]);
420 env->pc = tswapl(registers[68]);
421 env->npc = tswapl(registers[69]);
422 env->fsr = tswapl(registers[70]);
424 for (i = 0; i < 64; i += 2) {
427 tmp = tswap64(registers[i / 2 + 32]);
428 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
429 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
431 env->pc = tswapl(registers[64]);
432 env->npc = tswapl(registers[65]);
434 uint64_t tmp = tswapl(registers[66]);
436 PUT_CCR(env, tmp >> 32);
437 env->asi = (tmp >> 24) & 0xff;
438 env->pstate = (tmp >> 8) & 0xfff;
439 PUT_CWP64(env, tmp & 0xff);
441 env->fsr = tswapl(registers[67]);
442 env->fprs = tswapl(registers[68]);
443 env->y = tswapl(registers[69]);
446 #elif defined (TARGET_ARM)
447 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
453 /* 16 core integer registers (4 bytes each). */
454 for (i = 0; i < 16; i++)
456 *(uint32_t *)ptr = tswapl(env->regs[i]);
459 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
460 Not yet implemented. */
461 memset (ptr, 0, 8 * 12 + 4);
463 /* CPSR (4 bytes). */
464 *(uint32_t *)ptr = tswapl (cpsr_read(env));
467 return ptr - mem_buf;
470 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
476 /* Core integer registers. */
477 for (i = 0; i < 16; i++)
479 env->regs[i] = tswapl(*(uint32_t *)ptr);
482 /* Ignore FPA regs and scr. */
484 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
486 #elif defined (TARGET_M68K)
487 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
495 for (i = 0; i < 8; i++) {
496 *(uint32_t *)ptr = tswapl(env->dregs[i]);
500 for (i = 0; i < 8; i++) {
501 *(uint32_t *)ptr = tswapl(env->aregs[i]);
504 *(uint32_t *)ptr = tswapl(env->sr);
506 *(uint32_t *)ptr = tswapl(env->pc);
508 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
509 ColdFire has 8-bit double precision registers. */
510 for (i = 0; i < 8; i++) {
512 *(uint32_t *)ptr = tswap32(u.l.upper);
513 *(uint32_t *)ptr = tswap32(u.l.lower);
515 /* FP control regs (not implemented). */
516 memset (ptr, 0, 3 * 4);
519 return ptr - mem_buf;
522 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
530 for (i = 0; i < 8; i++) {
531 env->dregs[i] = tswapl(*(uint32_t *)ptr);
535 for (i = 0; i < 8; i++) {
536 env->aregs[i] = tswapl(*(uint32_t *)ptr);
539 env->sr = tswapl(*(uint32_t *)ptr);
541 env->pc = tswapl(*(uint32_t *)ptr);
543 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
544 ColdFire has 8-bit double precision registers. */
545 for (i = 0; i < 8; i++) {
546 u.l.upper = tswap32(*(uint32_t *)ptr);
547 u.l.lower = tswap32(*(uint32_t *)ptr);
550 /* FP control regs (not implemented). */
553 #elif defined (TARGET_MIPS)
554 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
560 for (i = 0; i < 32; i++)
562 *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
563 ptr += sizeof(target_ulong);
566 *(target_ulong *)ptr = tswapl(env->CP0_Status);
567 ptr += sizeof(target_ulong);
569 *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
570 ptr += sizeof(target_ulong);
572 *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
573 ptr += sizeof(target_ulong);
575 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
576 ptr += sizeof(target_ulong);
578 *(target_ulong *)ptr = tswapl(env->CP0_Cause);
579 ptr += sizeof(target_ulong);
581 *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
582 ptr += sizeof(target_ulong);
584 if (env->CP0_Config1 & (1 << CP0C1_FP))
586 for (i = 0; i < 32; i++)
588 *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].fs[FP_ENDIAN_IDX]);
589 ptr += sizeof(target_ulong);
592 *(target_ulong *)ptr = tswapl(env->fpu->fcr31);
593 ptr += sizeof(target_ulong);
595 *(target_ulong *)ptr = tswapl(env->fpu->fcr0);
596 ptr += sizeof(target_ulong);
599 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
600 /* what's 'fp' mean here? */
602 return ptr - mem_buf;
605 /* convert MIPS rounding mode in FCR31 to IEEE library */
606 static unsigned int ieee_rm[] =
608 float_round_nearest_even,
613 #define RESTORE_ROUNDING_MODE \
614 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
616 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
622 for (i = 0; i < 32; i++)
624 env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
625 ptr += sizeof(target_ulong);
628 env->CP0_Status = tswapl(*(target_ulong *)ptr);
629 ptr += sizeof(target_ulong);
631 env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
632 ptr += sizeof(target_ulong);
634 env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
635 ptr += sizeof(target_ulong);
637 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
638 ptr += sizeof(target_ulong);
640 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
641 ptr += sizeof(target_ulong);
643 env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
644 ptr += sizeof(target_ulong);
646 if (env->CP0_Config1 & (1 << CP0C1_FP))
648 for (i = 0; i < 32; i++)
650 env->fpu->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
651 ptr += sizeof(target_ulong);
654 env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;
655 ptr += sizeof(target_ulong);
657 env->fpu->fcr0 = tswapl(*(target_ulong *)ptr);
658 ptr += sizeof(target_ulong);
660 /* set rounding mode */
661 RESTORE_ROUNDING_MODE;
663 #ifndef CONFIG_SOFTFLOAT
664 /* no floating point exception for native float */
665 SET_FP_ENABLE(env->fcr31, 0);
669 #elif defined (TARGET_SH4)
671 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
673 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
675 uint32_t *ptr = (uint32_t *)mem_buf;
678 #define SAVE(x) *ptr++=tswapl(x)
679 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
680 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
682 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
684 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
694 for (i = 0; i < 16; i++)
695 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
698 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
699 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
700 return ((uint8_t *)ptr - mem_buf);
703 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
705 uint32_t *ptr = (uint32_t *)mem_buf;
708 #define LOAD(x) (x)=*ptr++;
709 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
710 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
712 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
714 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
724 for (i = 0; i < 16; i++)
725 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
728 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
729 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
731 #elif defined (TARGET_CRIS)
733 static int cris_save_32 (unsigned char *d, uint32_t value)
736 *d++ = (value >>= 8);
737 *d++ = (value >>= 8);
738 *d++ = (value >>= 8);
741 static int cris_save_16 (unsigned char *d, uint32_t value)
744 *d++ = (value >>= 8);
747 static int cris_save_8 (unsigned char *d, uint32_t value)
753 /* FIXME: this will bug on archs not supporting unaligned word accesses. */
754 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
756 uint8_t *ptr = mem_buf;
760 for (i = 0; i < 16; i++)
761 ptr += cris_save_32 (ptr, env->regs[i]);
763 srs = env->pregs[SR_SRS];
765 ptr += cris_save_8 (ptr, env->pregs[0]);
766 ptr += cris_save_8 (ptr, env->pregs[1]);
767 ptr += cris_save_32 (ptr, env->pregs[2]);
768 ptr += cris_save_8 (ptr, srs);
769 ptr += cris_save_16 (ptr, env->pregs[4]);
771 for (i = 5; i < 16; i++)
772 ptr += cris_save_32 (ptr, env->pregs[i]);
774 ptr += cris_save_32 (ptr, env->pc);
776 for (i = 0; i < 16; i++)
777 ptr += cris_save_32 (ptr, env->sregs[srs][i]);
779 return ((uint8_t *)ptr - mem_buf);
782 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
784 uint32_t *ptr = (uint32_t *)mem_buf;
787 #define LOAD(x) (x)=*ptr++;
788 for (i = 0; i < 16; i++) LOAD(env->regs[i]);
792 static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
797 static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
803 static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
806 int ch, reg_size, type;
808 uint8_t mem_buf[4096];
810 target_ulong addr, len;
813 printf("command='%s'\n", line_buf);
819 /* TODO: Make this return the correct value for user-mode. */
820 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
825 addr = strtoull(p, (char **)&p, 16);
826 #if defined(TARGET_I386)
828 #elif defined (TARGET_PPC)
830 #elif defined (TARGET_SPARC)
833 #elif defined (TARGET_ARM)
834 env->regs[15] = addr;
835 #elif defined (TARGET_SH4)
837 #elif defined (TARGET_MIPS)
838 env->PC[env->current_tc] = addr;
839 #elif defined (TARGET_CRIS)
843 #ifdef CONFIG_USER_ONLY
844 s->running_state = 1;
851 addr = strtoull(p, (char **)&p, 16);
852 #if defined(TARGET_I386)
854 #elif defined (TARGET_PPC)
856 #elif defined (TARGET_SPARC)
859 #elif defined (TARGET_ARM)
860 env->regs[15] = addr;
861 #elif defined (TARGET_SH4)
863 #elif defined (TARGET_MIPS)
864 env->PC[env->current_tc] = addr;
865 #elif defined (TARGET_CRIS)
869 cpu_single_step(env, 1);
870 #ifdef CONFIG_USER_ONLY
871 s->running_state = 1;
881 ret = strtoull(p, (char **)&p, 16);
884 err = strtoull(p, (char **)&p, 16);
891 if (gdb_current_syscall_cb)
892 gdb_current_syscall_cb(s->env, ret, err);
894 put_packet(s, "T02");
896 #ifdef CONFIG_USER_ONLY
897 s->running_state = 1;
905 reg_size = cpu_gdb_read_registers(env, mem_buf);
906 memtohex(buf, mem_buf, reg_size);
910 registers = (void *)mem_buf;
912 hextomem((uint8_t *)registers, p, len);
913 cpu_gdb_write_registers(env, mem_buf, len);
917 addr = strtoull(p, (char **)&p, 16);
920 len = strtoull(p, NULL, 16);
921 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
922 put_packet (s, "E14");
924 memtohex(buf, mem_buf, len);
929 addr = strtoull(p, (char **)&p, 16);
932 len = strtoull(p, (char **)&p, 16);
935 hextomem(mem_buf, p, len);
936 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
937 put_packet(s, "E14");
942 type = strtoul(p, (char **)&p, 16);
945 addr = strtoull(p, (char **)&p, 16);
948 len = strtoull(p, (char **)&p, 16);
949 if (type == 0 || type == 1) {
950 if (cpu_breakpoint_insert(env, addr) < 0)
951 goto breakpoint_error;
953 #ifndef CONFIG_USER_ONLY
954 } else if (type == 2) {
955 if (cpu_watchpoint_insert(env, addr) < 0)
956 goto breakpoint_error;
961 put_packet(s, "E22");
965 type = strtoul(p, (char **)&p, 16);
968 addr = strtoull(p, (char **)&p, 16);
971 len = strtoull(p, (char **)&p, 16);
972 if (type == 0 || type == 1) {
973 cpu_breakpoint_remove(env, addr);
975 #ifndef CONFIG_USER_ONLY
976 } else if (type == 2) {
977 cpu_watchpoint_remove(env, addr);
981 goto breakpoint_error;
984 #ifdef CONFIG_LINUX_USER
986 if (strncmp(p, "Offsets", 7) == 0) {
987 TaskState *ts = env->opaque;
990 "Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx,
991 ts->info->code_offset,
992 ts->info->data_offset,
993 ts->info->data_offset);
1001 /* put empty packet */
1009 extern void tb_flush(CPUState *env);
1011 #ifndef CONFIG_USER_ONLY
1012 static void gdb_vm_stopped(void *opaque, int reason)
1014 GDBState *s = opaque;
1018 if (s->state == RS_SYSCALL)
1021 /* disable single step if it was enable */
1022 cpu_single_step(s->env, 0);
1024 if (reason == EXCP_DEBUG) {
1025 if (s->env->watchpoint_hit) {
1026 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1028 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1030 s->env->watchpoint_hit = 0;
1035 } else if (reason == EXCP_INTERRUPT) {
1040 snprintf(buf, sizeof(buf), "S%02x", ret);
1045 /* Send a gdb syscall request.
1046 This accepts limited printf-style format specifiers, specifically:
1047 %x - target_ulong argument printed in hex.
1048 %lx - 64-bit argument printed in hex.
1049 %s - string pointer (target_ulong) and length (int) pair. */
1050 void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1059 s = gdb_syscall_state;
1062 gdb_current_syscall_cb = cb;
1063 s->state = RS_SYSCALL;
1064 #ifndef CONFIG_USER_ONLY
1065 vm_stop(EXCP_DEBUG);
1076 addr = va_arg(va, target_ulong);
1077 p += sprintf(p, TARGET_FMT_lx, addr);
1080 if (*(fmt++) != 'x')
1082 i64 = va_arg(va, uint64_t);
1083 p += sprintf(p, "%" PRIx64, i64);
1086 addr = va_arg(va, target_ulong);
1087 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1091 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1102 #ifdef CONFIG_USER_ONLY
1103 gdb_handlesig(s->env, 0);
1105 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1109 static void gdb_read_byte(GDBState *s, int ch)
1111 CPUState *env = s->env;
1115 #ifndef CONFIG_USER_ONLY
1116 if (s->last_packet_len) {
1117 /* Waiting for a response to the last packet. If we see the start
1118 of a new command then abandon the previous response. */
1121 printf("Got NACK, retransmitting\n");
1123 put_buffer(s, s->last_packet, s->last_packet_len);
1127 printf("Got ACK\n");
1129 printf("Got '%c' when expecting ACK/NACK\n", ch);
1131 if (ch == '+' || ch == '$')
1132 s->last_packet_len = 0;
1137 /* when the CPU is running, we cannot do anything except stop
1138 it when receiving a char */
1139 vm_stop(EXCP_INTERRUPT);
1146 s->line_buf_index = 0;
1147 s->state = RS_GETLINE;
1152 s->state = RS_CHKSUM1;
1153 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1156 s->line_buf[s->line_buf_index++] = ch;
1160 s->line_buf[s->line_buf_index] = '\0';
1161 s->line_csum = fromhex(ch) << 4;
1162 s->state = RS_CHKSUM2;
1165 s->line_csum |= fromhex(ch);
1167 for(i = 0; i < s->line_buf_index; i++) {
1168 csum += s->line_buf[i];
1170 if (s->line_csum != (csum & 0xff)) {
1172 put_buffer(s, reply, 1);
1176 put_buffer(s, reply, 1);
1177 s->state = gdb_handle_packet(s, env, s->line_buf);
1186 #ifdef CONFIG_USER_ONLY
1188 gdb_handlesig (CPUState *env, int sig)
1194 if (gdbserver_fd < 0)
1197 s = &gdbserver_state;
1199 /* disable single step if it was enabled */
1200 cpu_single_step(env, 0);
1205 snprintf(buf, sizeof(buf), "S%02x", sig);
1211 s->running_state = 0;
1212 while (s->running_state == 0) {
1213 n = read (s->fd, buf, 256);
1218 for (i = 0; i < n; i++)
1219 gdb_read_byte (s, buf[i]);
1221 else if (n == 0 || errno != EAGAIN)
1223 /* XXX: Connection closed. Should probably wait for annother
1224 connection before continuing. */
1231 /* Tell the remote gdb that the process has exited. */
1232 void gdb_exit(CPUState *env, int code)
1237 if (gdbserver_fd < 0)
1240 s = &gdbserver_state;
1242 snprintf(buf, sizeof(buf), "W%02x", code);
1247 static void gdb_accept(void *opaque)
1250 struct sockaddr_in sockaddr;
1255 len = sizeof(sockaddr);
1256 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1257 if (fd < 0 && errno != EINTR) {
1260 } else if (fd >= 0) {
1265 /* set short latency */
1267 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
1269 s = &gdbserver_state;
1270 memset (s, 0, sizeof (GDBState));
1271 s->env = first_cpu; /* XXX: allow to change CPU */
1274 gdb_syscall_state = s;
1276 fcntl(fd, F_SETFL, O_NONBLOCK);
1279 static int gdbserver_open(int port)
1281 struct sockaddr_in sockaddr;
1284 fd = socket(PF_INET, SOCK_STREAM, 0);
1290 /* allow fast reuse */
1292 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
1294 sockaddr.sin_family = AF_INET;
1295 sockaddr.sin_port = htons(port);
1296 sockaddr.sin_addr.s_addr = 0;
1297 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1302 ret = listen(fd, 0);
1310 int gdbserver_start(int port)
1312 gdbserver_fd = gdbserver_open(port);
1313 if (gdbserver_fd < 0)
1315 /* accept connections */
1320 static int gdb_chr_can_receive(void *opaque)
1325 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
1327 GDBState *s = opaque;
1330 for (i = 0; i < size; i++) {
1331 gdb_read_byte(s, buf[i]);
1335 static void gdb_chr_event(void *opaque, int event)
1338 case CHR_EVENT_RESET:
1339 vm_stop(EXCP_INTERRUPT);
1340 gdb_syscall_state = opaque;
1347 int gdbserver_start(const char *port)
1350 char gdbstub_port_name[128];
1353 CharDriverState *chr;
1355 if (!port || !*port)
1358 port_num = strtol(port, &p, 10);
1360 /* A numeric value is interpreted as a port number. */
1361 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1362 "tcp::%d,nowait,nodelay,server", port_num);
1363 port = gdbstub_port_name;
1366 chr = qemu_chr_open(port);
1370 s = qemu_mallocz(sizeof(GDBState));
1374 s->env = first_cpu; /* XXX: allow to change CPU */
1376 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
1378 qemu_add_vm_stop_handler(gdb_vm_stopped, s);