From a45db6c6fd587be85118038be3722c1dadeedfe4 Mon Sep 17 00:00:00 2001 From: aurel32 Date: Sat, 7 Mar 2009 21:47:53 +0000 Subject: [PATCH] arm: Fix gic_irq_state.level bitfield type Found while cleaning up compiler warnings: GIC_*_LEVEL macros strongly suggest that gic_irq_state.level is intended to be per-CPU and not just a single, global bit. I'm unable to test the effect, but it seems to be the most reasonable fix for the apparent brokenness. Signed-off-by: Jan Kiszka Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6765 c046a42c-6fe2-441c-8c8c-71466251a162 --- hw/arm_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index fef3113..8e61b6e 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -39,7 +39,7 @@ typedef struct gic_irq_state unsigned enabled:1; unsigned pending:NCPU; unsigned active:NCPU; - unsigned level:1; + unsigned level:NCPU; unsigned model:1; /* 0 = N:N, 1 = 1:N */ unsigned trigger:1; /* nonzero = edge triggered. */ } gic_irq_state; -- 1.7.9.5