smc91c111_writel
};
+int smc91c111_iomemtype(void *opaque) {
+ smc91c111_state *s=(smc91c111_state *) opaque;
- return s->iomemtype;
++ return s->mmio_index;
+}
+
+static void smc91c111_save_state(QEMUFile *f, void *opaque)
+{
+ smc91c111_state *s = (smc91c111_state *)opaque;
+ int i;
+
+ qemu_put_be16(f, s->tcr);
+ qemu_put_be16(f, s->rcr);
+ qemu_put_be16(f, s->cr);
+ qemu_put_be16(f, s->ctr);
+ qemu_put_be16(f, s->gpr);
+ qemu_put_be16(f, s->ptr);
+ qemu_put_be16(f, s->ercv);
+ qemu_put_sbe32(f, s->bank);
+ qemu_put_sbe32(f, s->packet_num);
+ qemu_put_sbe32(f, s->tx_alloc);
+ qemu_put_sbe32(f, s->allocated);
+ qemu_put_sbe32(f, s->tx_fifo_len);
+ qemu_put_sbe32(f, s->rx_fifo_len);
+ qemu_put_sbe32(f, s->tx_fifo_done_len);
+ qemu_put_byte(f, s->int_level);
+ qemu_put_byte(f, s->int_mask);
+ qemu_put_buffer(f, s->macaddr, sizeof(s->macaddr));
+ for (i = 0; i < NUM_PACKETS; i++) {
+ qemu_put_sbe32(f, s->tx_fifo[i]);
+ qemu_put_sbe32(f, s->rx_fifo[i]);
+ qemu_put_sbe32(f, s->tx_fifo_done[i]);
+ qemu_put_buffer(f, s->data[i], sizeof(s->data[i]));
+ }
+}
+
+static int smc91c111_load_state(QEMUFile *f, void *opaque, int version_id)
+{
+ smc91c111_state *s = (smc91c111_state *)opaque;
+ int i;
+
+ if (version_id)
+ return -EINVAL;
+
+ s->tcr = qemu_get_be16(f);
+ s->rcr = qemu_get_be16(f);
+ s->cr = qemu_get_be16(f);
+ s->ctr = qemu_get_be16(f);
+ s->gpr = qemu_get_be16(f);
+ s->ptr = qemu_get_be16(f);
+ s->ercv = qemu_get_be16(f);
+ s->bank = qemu_get_sbe32(f);
+ s->packet_num = qemu_get_sbe32(f);
+ s->tx_alloc = qemu_get_sbe32(f);
+ s->allocated = qemu_get_sbe32(f);
+ s->tx_fifo_len = qemu_get_sbe32(f);
+ s->rx_fifo_len = qemu_get_sbe32(f);
+ s->tx_fifo_done_len = qemu_get_sbe32(f);
+ s->int_level = qemu_get_byte(f);
+ s->int_mask = qemu_get_byte(f);
+ qemu_get_buffer(f, s->macaddr, sizeof(s->macaddr));
+ for (i = 0; i < NUM_PACKETS; i++) {
+ s->tx_fifo[i] = qemu_get_sbe32(f);
+ s->rx_fifo[i] = qemu_get_sbe32(f);
+ s->tx_fifo_done[i] = qemu_get_sbe32(f);
+ qemu_get_buffer(f, s->data[i], sizeof(s->data[i]));
+ }
+
+ smc91c111_update(s);
+
+ return 0;
+}
+
+ static void smc91c111_cleanup(VLANClientState *vc)
+ {
+ smc91c111_state *s = vc->opaque;
+
+ cpu_unregister_io_memory(s->mmio_index);
+ qemu_free(s);
+ }
+
-void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)
+void *smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq, int phys_alloc)
{
smc91c111_state *s;
qemu_check_nic_model(nd, "smc91c111");
s = (smc91c111_state *)qemu_mallocz(sizeof(smc91c111_state));
- s->iomemtype = cpu_register_io_memory(0, smc91c111_readfn,
- smc91c111_writefn, s);
+ s->mmio_index = cpu_register_io_memory(0, smc91c111_readfn,
+ smc91c111_writefn, s);
- cpu_register_physical_memory(base, 16, s->mmio_index);
+ if (phys_alloc)
- cpu_register_physical_memory(base, 16, s->iomemtype);
++ cpu_register_physical_memory(base, 16, s->mmio_index);
s->irq = irq;
memcpy(s->macaddr, nd->macaddr, 6);
smc91c111_reset(s);
s->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
- smc91c111_receive, smc91c111_can_receive, s);
+ smc91c111_receive, smc91c111_can_receive,
+ smc91c111_cleanup, s);
qemu_format_nic_info_str(s->vc, s->macaddr);
/* ??? Save/restore. */
+ register_savevm("smc91c111", -1, 0,
+ smc91c111_save_state, smc91c111_load_state, s);
+ return s;
}
#include "usb.h"
#include "pci.h"
#include "pxa.h"
+#include "omap.h"
+ #include "devices.h"
//#define DEBUG_OHCI
/* Dump packet contents. */
enum ohci_type {
OHCI_TYPE_PCI,
OHCI_TYPE_PXA,
+ OHCI_TYPE_OMAP
+ OHCI_TYPE_SM501,
};
typedef struct {
cpu_register_physical_memory(base, 0x1000, ohci->mem);
}
+int usb_ohci_init_omap(target_phys_addr_t base, uint32_t region_size,
+ int num_ports, qemu_irq irq)
+{
+ OHCIState *ohci = (OHCIState *)qemu_mallocz(sizeof(OHCIState));
+
+ usb_ohci_init(ohci, num_ports, -1, irq, OHCI_TYPE_OMAP, "OHCI USB");
+ return ohci->mem;
+}
++
+ void usb_ohci_init_sm501(uint32_t mmio_base, uint32_t localmem_base,
+ int num_ports, int devfn, qemu_irq irq)
+ {
+ OHCIState *ohci = (OHCIState *)qemu_mallocz(sizeof(OHCIState));
+
+ usb_ohci_init(ohci, num_ports, devfn, irq,
+ OHCI_TYPE_SM501, "OHCI USB", localmem_base);
+
+ cpu_register_physical_memory(mmio_base, 0x1000, ohci->mem);
+ }
+