X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fversatile_pci.c;h=68f18ef3f889078eac515c28f383fb6514c5ef4e;hb=cd346349b45ef056f138a184f660b8c34c3213cc;hp=34a4bc6c5a735522453d30713cc2f3025cc3e428;hpb=502a53952d574717bdb626b651b16cadacab46f4;p=qemu

diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index 34a4bc6..68f18ef 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * ARM Versatile/PB PCI host controller
  *
  * Copyright (c) 2006 CodeSourcery.
@@ -11,7 +11,7 @@
 
 static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr)
 {
-    return addr & 0xf8ff;
+    return addr & 0xffffff;
 }
 
 static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr,
@@ -77,31 +77,54 @@ static CPUReadMemoryFunc *pci_vpb_config_read[] = {
     &pci_vpb_config_readl,
 };
 
-static void pci_vpb_set_irq(PCIDevice *d, void *pic, int irq_num, int level)
+static int pci_vpb_irq;
+
+static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
+{
+    return irq_num;
+}
+
+static void pci_vpb_set_irq(qemu_irq *pic, int irq_num, int level)
 {
-    pic_set_irq_new(pic, 27 + irq_num, level);
+    qemu_set_irq(pic[pci_vpb_irq + irq_num], level);
 }
 
-PCIBus *pci_vpb_init(void *pic)
+PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview)
 {
     PCIBus *s;
     PCIDevice *d;
     int mem_config;
-
-    s = pci_register_bus(pci_vpb_set_irq, pic, 11 << 3);
+    uint32_t base;
+    const char * name;
+
+    pci_vpb_irq = irq;
+    if (realview) {
+        base = 0x60000000;
+        name = "RealView EB PCI Controller";
+    } else {
+        base = 0x40000000;
+        name = "Versatile/PB PCI Controller";
+    }
+    s = pci_register_bus(pci_vpb_set_irq, pci_vpb_map_irq, pic, 11 << 3, 4);
     /* ??? Register memory space.  */
 
     mem_config = cpu_register_io_memory(0, pci_vpb_config_read,
                                         pci_vpb_config_write, s);
     /* Selfconfig area.  */
-    cpu_register_physical_memory(0x41000000, 0x10000, mem_config);
+    cpu_register_physical_memory(base + 0x01000000, 0x1000000, mem_config);
     /* Normal config area.  */
-    cpu_register_physical_memory(0x42000000, 0x10000, mem_config);
+    cpu_register_physical_memory(base + 0x02000000, 0x1000000, mem_config);
+
+    d = pci_register_device(s, name, sizeof(PCIDevice), -1, NULL, NULL);
+
+    if (realview) {
+        /* IO memory area.  */
+        isa_mmio_init(base + 0x03000000, 0x00100000);
+    }
 
-    d = pci_register_device(s, "Versatile/PB PCI Controller",
-                            sizeof(PCIDevice), -1, NULL, NULL);
     d->config[0x00] = 0xee; // vendor_id
     d->config[0x01] = 0x10;
+    /* Both boards have the same device ID.  Oh well.  */
     d->config[0x02] = 0x00; // device_id
     d->config[0x03] = 0x03;
     d->config[0x04] = 0x00;