X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fsun4u.c;h=bac0ebf46d190dca47bc59413df1d311bf9e58fd;hb=cd346349b45ef056f138a184f660b8c34c3213cc;hp=a7b9ad8f012c2738105210df2ad72ecd7e87e924;hpb=20c9f095c4536e64e60432a5c72fce38e8306cbb;p=qemu diff --git a/hw/sun4u.c b/hw/sun4u.c index a7b9ad8..bac0ebf 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -1,8 +1,8 @@ /* * QEMU Sun4u System Emulator - * + * * Copyright (c) 2005 Fabrice Bellard - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -28,11 +28,12 @@ #define CMDLINE_ADDR 0x003ff000 #define INITRD_LOAD_ADDR 0x00300000 #define PROM_SIZE_MAX (512 * 1024) -#define PROM_ADDR 0x1fff0000000ULL +#define PROM_ADDR 0x1fff0000000ULL +#define PROM_VADDR 0x000ffd00000ULL #define APB_SPECIAL_BASE 0x1fe00000000ULL -#define APB_MEM_BASE 0x1ff00000000ULL -#define VGA_BASE (APB_MEM_BASE + 0x400000ULL) -#define PROM_FILENAME "openbios-sparc64" +#define APB_MEM_BASE 0x1ff00000000ULL +#define VGA_BASE (APB_MEM_BASE + 0x400000ULL) +#define PROM_FILENAME "openbios-sparc64" #define NVRAM_SIZE 0x2000 /* TSC handling */ @@ -161,10 +162,10 @@ uint16_t NVRAM_compute_crc (m48t59_t *nvram, uint32_t start, uint32_t count) odd = count & 1; count &= ~1; for (i = 0; i != count; i++) { - crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i)); + crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i)); } if (odd) { - crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8); + crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8); } return crc; @@ -244,7 +245,7 @@ int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, // OpenBIOS nvram variables // Variable partition - start = 252; + start = 256; m48t59_write(nvram, start, 0x70); NVRAM_set_string(nvram, start + 4, "system", 12); @@ -313,6 +314,10 @@ void hstick_irq(void *opaque) cpu_interrupt(env, CPU_INTERRUPT_TIMER); } +static void dummy_cpu_set_irq(void *opaque, int irq, int level) +{ +} + static const int ide_iobase[2] = { 0x1f0, 0x170 }; static const int ide_iobase2[2] = { 0x3f6, 0x376 }; static const int ide_irq[2] = { 14, 15 }; @@ -340,6 +345,7 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, PCIBus *pci_bus; const sparc_def_t *def; QEMUBH *bh; + qemu_irq *irq; linux_boot = (kernel_filename != NULL); @@ -352,7 +358,7 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, exit(1); } env = cpu_init(); - cpu_sparc_register(env, def); + cpu_sparc_register(env, def, 0); bh = qemu_bh_new(tick_irq, env); env->tick = ptimer_init(bh); ptimer_set_period(env->tick, 1ULL); @@ -372,16 +378,18 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, cpu_register_physical_memory(0, ram_size, 0); prom_offset = ram_size + vga_ram_size; - cpu_register_physical_memory(PROM_ADDR, - (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK, + cpu_register_physical_memory(PROM_ADDR, + (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK, prom_offset | IO_MEM_ROM); - snprintf(buf, sizeof(buf), "%s/%s", bios_dir, PROM_FILENAME); - ret = load_elf(buf, 0, NULL, NULL, NULL); + if (bios_name == NULL) + bios_name = PROM_FILENAME; + snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); + ret = load_elf(buf, PROM_ADDR - PROM_VADDR, NULL, NULL, NULL); if (ret < 0) { - fprintf(stderr, "qemu: could not load prom '%s'\n", - buf); - exit(1); + fprintf(stderr, "qemu: could not load prom '%s'\n", + buf); + exit(1); } kernel_size = 0; @@ -390,33 +398,33 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, /* XXX: put correct offset */ kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL); if (kernel_size < 0) - kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); - if (kernel_size < 0) - kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); + kernel_size = load_aout(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); + if (kernel_size < 0) + kernel_size = load_image(kernel_filename, phys_ram_base + KERNEL_LOAD_ADDR); if (kernel_size < 0) { - fprintf(stderr, "qemu: could not load kernel '%s'\n", + fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); - exit(1); + exit(1); } /* load initrd */ if (initrd_filename) { initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); if (initrd_size < 0) { - fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", + fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", initrd_filename); exit(1); } } if (initrd_size > 0) { - for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { - if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i) - == 0x48647253) { // HdrS - stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR); - stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size); - break; - } - } + for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { + if (ldl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i) + == 0x48647253) { // HdrS + stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR); + stl_raw(phys_ram_base + KERNEL_LOAD_ADDR + i + 20, initrd_size); + break; + } + } } } pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL); @@ -438,10 +446,12 @@ static void sun4u_init(int ram_size, int vga_ram_size, int boot_device, for(i = 0; i < nb_nics; i++) { if (!nd_table[i].model) nd_table[i].model = "ne2k_pci"; - pci_nic_init(pci_bus, &nd_table[i], -1); + pci_nic_init(pci_bus, &nd_table[i], -1); } - pci_cmd646_ide_init(pci_bus, bs_table, 1); + irq = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, 32); + // XXX pci_cmd646_ide_init(pci_bus, bs_table, 1); + pci_piix3_ide_init(pci_bus, bs_table, -1, irq); /* FIXME: wire up interrupts. */ i8042_init(NULL/*1*/, NULL/*12*/, 0x60); floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd_table);