X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fpl181.c;h=75c3143e27f060214acad779f2df8151923990f9;hb=b6cd0ea1205dd4623ccfe796ee6c1a4da3141d99;hp=912465971f04c4bb558f87c134538c3c1c346a88;hpb=6361cdb630afa036dcff8586735c38d1aca55a7c;p=qemu

diff --git a/hw/pl181.c b/hw/pl181.c
index 9124659..75c3143 100644
--- a/hw/pl181.c
+++ b/hw/pl181.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * Arm PrimeCell PL181 MultiMedia Card Interface
  *
  * Copyright (c) 2007 CodeSourcery.
@@ -7,7 +7,8 @@
  * This code is licenced under the GPL.
  */
 
-#include "vl.h"
+#include "hw.h"
+#include "primecell.h"
 #include "sd.h"
 
 //#define DEBUG_PL181 1
@@ -160,7 +161,7 @@ static void pl181_send_command(pl181_state *s)
             s->response[2] = RWORD(8);
             s->response[3] = RWORD(12) & ~1;
         }
-        DPRINTF("Response recieved\n");
+        DPRINTF("Response received\n");
         s->status |= PL181_STATUS_CMDRESPEND;
 #undef RWORD
     } else {
@@ -174,10 +175,10 @@ error:
     s->status |= PL181_STATUS_CMDTIMEOUT;
 }
 
-/* Transfer data between teh card and the FIFO.  This is complicated by
+/* Transfer data between the card and the FIFO.  This is complicated by
    the FIFO holding 32-bit words and the card taking data in single byte
    chunks.  FIFO bytes are transferred in little-endian order.  */
-   
+
 static void pl181_fifo_run(pl181_state *s)
 {
     uint32_t bits;
@@ -333,7 +334,7 @@ static uint32_t pl181_read(void *opaque, target_phys_addr_t offset)
             return value;
         }
     default:
-        cpu_abort (cpu_single_env, "pl181_read: Bad offset %x\n", offset);
+        cpu_abort (cpu_single_env, "pl181_read: Bad offset %x\n", (int)offset);
         return 0;
     }
 }
@@ -405,7 +406,7 @@ static void pl181_write(void *opaque, target_phys_addr_t offset,
         }
         break;
     default:
-        cpu_abort (cpu_single_env, "pl181_write: Bad offset %x\n", offset);
+        cpu_abort (cpu_single_env, "pl181_write: Bad offset %x\n", (int)offset);
     }
     pl181_update(s);
 }
@@ -457,7 +458,7 @@ void pl181_init(uint32_t base, BlockDriverState *bd,
                                        pl181_writefn, s);
     cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
-    s->card = sd_init(bd);
+    s->card = sd_init(bd, 0);
     s->irq[0] = irq0;
     s->irq[1] = irq1;
     qemu_register_reset(pl181_reset, s);