X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fpl011.c;h=94ed6994d739b612d91f1660d9c3cf9314697202;hb=cd346349b45ef056f138a184f660b8c34c3213cc;hp=29e551ad8b722d5185b0087ce79cedc626283810;hpb=d537cf6c8624b27ce2b63431d2f8937f6356f652;p=qemu

diff --git a/hw/pl011.c b/hw/pl011.c
index 29e551a..94ed699 100644
--- a/hw/pl011.c
+++ b/hw/pl011.c
@@ -1,4 +1,4 @@
-/* 
+/*
  * Arm PrimeCell PL011 UART
  *
  * Copyright (c) 2006 CodeSourcery.
@@ -44,7 +44,7 @@ static const unsigned char pl011_id[] =
 static void pl011_update(pl011_state *s)
 {
     uint32_t flags;
-    
+
     flags = s->int_level & s->int_enabled;
     qemu_set_irq(s->irq, flags != 0);
 }
@@ -176,7 +176,7 @@ static void pl011_write(void *opaque, target_phys_addr_t offset,
     }
 }
 
-static int pl011_can_recieve(void *opaque)
+static int pl011_can_receive(void *opaque)
 {
     pl011_state *s = (pl011_state *)opaque;
 
@@ -186,7 +186,7 @@ static int pl011_can_recieve(void *opaque)
         return s->read_count < 1;
 }
 
-static void pl011_recieve(void *opaque, const uint8_t *buf, int size)
+static void pl011_receive(void *opaque, const uint8_t *buf, int size)
 {
     pl011_state *s = (pl011_state *)opaque;
     int slot;
@@ -232,7 +232,7 @@ void pl011_init(uint32_t base, qemu_irq irq,
     s = (pl011_state *)qemu_mallocz(sizeof(pl011_state));
     iomemtype = cpu_register_io_memory(0, pl011_readfn,
                                        pl011_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
+    cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
     s->irq = irq;
     s->chr = chr;
@@ -240,8 +240,8 @@ void pl011_init(uint32_t base, qemu_irq irq,
     s->ifl = 0x12;
     s->cr = 0x300;
     s->flags = 0x90;
-    if (chr){ 
-        qemu_chr_add_handlers(chr, pl011_can_recieve, pl011_recieve,
+    if (chr){
+        qemu_chr_add_handlers(chr, pl011_can_receive, pl011_receive,
                               pl011_event, s);
     }
     /* ??? Save/restore.  */