X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fpflash_cfi02.c;h=08f88900f074b54f40f8899f241b06ccfe859a4e;hb=cd346349b45ef056f138a184f660b8c34c3213cc;hp=fc38cd6f41d68440c53311c7e8f55e9024ba33a4;hpb=e96efcfcb19b81d87ed3baec419b14cdd6e021a4;p=qemu diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index fc38cd6..08f8890 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -1,6 +1,6 @@ /* * CFI parallel flash with AMD command set emulation - * + * * Copyright (c) 2005 Jocelyn Mayer * * This library is free software; you can redistribute it and/or @@ -50,9 +50,9 @@ do { \ struct pflash_t { BlockDriverState *bs; - target_ulong base; - target_ulong sector_len; - target_ulong total_len; + target_phys_addr_t base; + uint32_t sector_len; + uint32_t total_len; int width; int wcycle; /* if 0, the flash is read normally */ int bypass; @@ -85,9 +85,9 @@ static void pflash_timer (void *opaque) pfl->cmd = 0; } -static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width) +static uint32_t pflash_read (pflash_t *pfl, uint32_t offset, int width) { - target_ulong boff; + uint32_t boff; uint32_t ret; uint8_t *p; @@ -185,7 +185,7 @@ static uint32_t pflash_read (pflash_t *pfl, target_ulong offset, int width) } /* update flash content on disk */ -static void pflash_update(pflash_t *pfl, int offset, +static void pflash_update(pflash_t *pfl, int offset, int size) { int offset_end; @@ -194,33 +194,37 @@ static void pflash_update(pflash_t *pfl, int offset, /* round to sectors */ offset = offset >> 9; offset_end = (offset_end + 511) >> 9; - bdrv_write(pfl->bs, offset, pfl->storage + (offset << 9), + bdrv_write(pfl->bs, offset, pfl->storage + (offset << 9), offset_end - offset); } } -static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, +static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value, int width) { - target_ulong boff; + uint32_t boff; uint8_t *p; uint8_t cmd; /* WARNING: when the memory area is in ROMD mode, the offset is a ram offset, not a physical address */ - if (pfl->wcycle == 0) - offset -= (target_ulong)(long)pfl->storage; - else - offset -= pfl->base; - cmd = value; - DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d\n", __func__, - offset, value, width); if (pfl->cmd != 0xA0 && cmd == 0xF0) { +#if 0 DPRINTF("%s: flash reset asked (%02x %02x)\n", __func__, pfl->cmd, cmd); +#endif goto reset_flash; } + DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d %d\n", __func__, + offset, value, width, pfl->wcycle); + if (pfl->wcycle == 0) + offset -= (uint32_t)(long)pfl->storage; + else + offset -= pfl->base; + + DPRINTF("%s: offset " TARGET_FMT_lx " %08x %d\n", __func__, + offset, value, width); /* Set the device in I/O access mode */ cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem); boff = offset & (pfl->sector_len - 1); @@ -365,7 +369,7 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, pfl->status = 0x00; pflash_update(pfl, 0, pfl->total_len); /* Let's wait 5 seconds before chip erase is done */ - qemu_mod_timer(pfl->timer, + qemu_mod_timer(pfl->timer, qemu_get_clock(vm_clock) + (ticks_per_sec * 5)); break; case 0x30: @@ -378,7 +382,7 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, pflash_update(pfl, offset, pfl->sector_len); pfl->status = 0x00; /* Let's wait 1/2 second before sector erase is done */ - qemu_mod_timer(pfl->timer, + qemu_mod_timer(pfl->timer, qemu_get_clock(vm_clock) + (ticks_per_sec / 2)); break; default: @@ -416,10 +420,8 @@ static void pflash_write (pflash_t *pfl, target_ulong offset, uint32_t value, /* Reset flash */ reset_flash: - if (pfl->wcycle != 0) { - cpu_register_physical_memory(pfl->base, pfl->total_len, - pfl->off | IO_MEM_ROMD | pfl->fl_mem); - } + cpu_register_physical_memory(pfl->base, pfl->total_len, + pfl->off | IO_MEM_ROMD | pfl->fl_mem); pfl->bypass = 0; pfl->wcycle = 0; pfl->cmd = 0; @@ -519,25 +521,28 @@ static int ctz32 (uint32_t n) return ret; } -pflash_t *pflash_register (target_ulong base, ram_addr_t off, +pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, BlockDriverState *bs, - target_ulong sector_len, int nb_blocs, int width, - uint16_t id0, uint16_t id1, + uint32_t sector_len, int nb_blocs, int width, + uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3) { pflash_t *pfl; - target_long total_len; + int32_t total_len; total_len = sector_len * nb_blocs; /* XXX: to be fixed */ +#if 0 if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) && total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024)) return NULL; +#endif pfl = qemu_mallocz(sizeof(pflash_t)); if (pfl == NULL) return NULL; pfl->storage = phys_ram_base + off; - pfl->fl_mem = cpu_register_io_memory(0, pflash_read_ops, pflash_write_ops, pfl); + pfl->fl_mem = cpu_register_io_memory(0, pflash_read_ops, pflash_write_ops, + pfl); pfl->off = off; cpu_register_physical_memory(base, total_len, off | pfl->fl_mem | IO_MEM_ROMD); @@ -613,7 +618,9 @@ pflash_t *pflash_register (target_ulong base, ram_addr_t off, pfl->cfi_table[0x28] = 0x02; pfl->cfi_table[0x29] = 0x00; /* Max number of bytes in multi-bytes write */ - pfl->cfi_table[0x2A] = 0x05; + /* XXX: disable buffered write as it's not supported */ + // pfl->cfi_table[0x2A] = 0x05; + pfl->cfi_table[0x2A] = 0x00; pfl->cfi_table[0x2B] = 0x00; /* Number of erase block regions (uniform) */ pfl->cfi_table[0x2C] = 0x01;