X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Fpc.c;h=b930e4053e4d1fe450bf7fb10cdd51cef21ce2bf;hb=ad49ff9de3f15d1b91416ecd005cfae16aba0026;hp=5431a41ac38c90452049b4bb2d9232383761c644;hpb=67b915a5dd52a05f8030cd9edc005effd9c8eea5;p=qemu diff --git a/hw/pc.c b/hw/pc.c index 5431a41..b930e40 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -28,6 +28,7 @@ #define BIOS_FILENAME "bios.bin" #define VGABIOS_FILENAME "vgabios.bin" +#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" #define LINUX_BOOT_FILENAME "linux_boot.bin" #define KERNEL_LOAD_ADDR 0x00100000 @@ -39,11 +40,59 @@ int speaker_data_on; int dummy_refresh_clock; static fdctrl_t *floppy_controller; static RTCState *rtc_state; +static PITState *pit; +static IOAPICState *ioapic; +static USBPort *usb_root_ports[2]; static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) { } +/* MSDOS compatibility mode FPU exception support */ +/* XXX: add IGNNE support */ +void cpu_set_ferr(CPUX86State *s) +{ + pic_set_irq(13, 1); +} + +static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) +{ + pic_set_irq(13, 0); +} + +/* TSC handling */ + +uint64_t cpu_get_tsc(CPUX86State *env) +{ + return qemu_get_clock(vm_clock); +} + +/* IRQ handling */ +int cpu_get_pic_interrupt(CPUState *env) +{ + int intno; + + intno = apic_get_interrupt(env); + if (intno >= 0) { + /* set irq request if a PIC irq is still pending */ + /* XXX: improve that */ + pic_update_irq(isa_pic); + return intno; + } + /* read the irq from the PIC */ + intno = pic_read_irq(isa_pic); + return intno; +} + +static void pic_irq_request(void *opaque, int level) +{ + CPUState *env = opaque; + if (level) + cpu_interrupt(env, CPU_INTERRUPT_HARD); + else + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); +} + /* PC cmos mappings */ #define REG_EQUIPMENT_BYTE 0x14 @@ -56,17 +105,63 @@ static inline int to_bcd(RTCState *s, int a) return ((a / 10) << 4) | (a % 10); } -static void cmos_init(int ram_size, int boot_device) +static int cmos_get_fd_drive_type(int fd0) +{ + int val; + + switch (fd0) { + case 0: + /* 1.44 Mb 3"5 drive */ + val = 4; + break; + case 1: + /* 2.88 Mb 3"5 drive */ + val = 5; + break; + case 2: + /* 1.2 Mb 5"5 drive */ + val = 2; + break; + default: + val = 0; + break; + } + return val; +} + +static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) +{ + RTCState *s = rtc_state; + int cylinders, heads, sectors; + bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); + rtc_set_memory(s, type_ofs, 47); + rtc_set_memory(s, info_ofs, cylinders); + rtc_set_memory(s, info_ofs + 1, cylinders >> 8); + rtc_set_memory(s, info_ofs + 2, heads); + rtc_set_memory(s, info_ofs + 3, 0xff); + rtc_set_memory(s, info_ofs + 4, 0xff); + rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); + rtc_set_memory(s, info_ofs + 6, cylinders); + rtc_set_memory(s, info_ofs + 7, cylinders >> 8); + rtc_set_memory(s, info_ofs + 8, sectors); +} + +/* hd_table must contain 4 block drivers */ +static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) { RTCState *s = rtc_state; int val; int fd0, fd1, nb; time_t ti; struct tm *tm; + int i; /* set the CMOS date */ time(&ti); - tm = gmtime(&ti); + if (rtc_utc) + tm = gmtime(&ti); + else + tm = localtime(&ti); rtc_set_date(s, tm); val = to_bcd(s, (tm->tm_year / 100) + 19); @@ -76,6 +171,10 @@ static void cmos_init(int ram_size, int boot_device) /* various important CMOS locations needed by PC/Bochs bios */ /* memory size */ + val = 640; /* base memory in K */ + rtc_set_memory(s, 0x15, val); + rtc_set_memory(s, 0x16, val >> 8); + val = (ram_size / 1024) - 1024; if (val > 65535) val = 65535; @@ -84,7 +183,10 @@ static void cmos_init(int ram_size, int boot_device) rtc_set_memory(s, 0x30, val); rtc_set_memory(s, 0x31, val >> 8); - val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); + if (ram_size > (16 * 1024 * 1024)) + val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); + else + val = 0; if (val > 65535) val = 65535; rtc_set_memory(s, 0x34, val); @@ -109,35 +211,7 @@ static void cmos_init(int ram_size, int boot_device) fd0 = fdctrl_get_drive_type(floppy_controller, 0); fd1 = fdctrl_get_drive_type(floppy_controller, 1); - val = 0; - switch (fd0) { - case 0: - /* 1.44 Mb 3"5 drive */ - val |= 0x40; - break; - case 1: - /* 2.88 Mb 3"5 drive */ - val |= 0x60; - break; - case 2: - /* 1.2 Mb 5"5 drive */ - val |= 0x20; - break; - } - switch (fd1) { - case 0: - /* 1.44 Mb 3"5 drive */ - val |= 0x04; - break; - case 1: - /* 2.88 Mb 3"5 drive */ - val |= 0x06; - break; - case 2: - /* 1.2 Mb 5"5 drive */ - val |= 0x02; - break; - } + val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1); rtc_set_memory(s, 0x10, val); val = 0; @@ -160,28 +234,90 @@ static void cmos_init(int ram_size, int boot_device) val |= 0x04; /* PS/2 mouse installed */ rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); + /* hard drives */ + + rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); + if (hd_table[0]) + cmos_init_hd(0x19, 0x1b, hd_table[0]); + if (hd_table[1]) + cmos_init_hd(0x1a, 0x24, hd_table[1]); + + val = 0; + for (i = 0; i < 4; i++) { + if (hd_table[i]) { + int cylinders, heads, sectors, translation; + /* NOTE: bdrv_get_geometry_hint() returns the physical + geometry. It is always such that: 1 <= sects <= 63, 1 + <= heads <= 16, 1 <= cylinders <= 16383. The BIOS + geometry can be different if a translation is done. */ + translation = bdrv_get_translation_hint(hd_table[i]); + if (translation == BIOS_ATA_TRANSLATION_AUTO) { + bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); + if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { + /* No translation. */ + translation = 0; + } else { + /* LBA translation. */ + translation = 1; + } + } else { + translation--; + } + val |= translation << (i * 2); + } + } + rtc_set_memory(s, 0x39, val); + + /* Disable check of 0x55AA signature on the last two bytes of + first sector of disk. XXX: make it the default ? */ + // rtc_set_memory(s, 0x38, 1); } static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val) { speaker_data_on = (val >> 1) & 1; - pit_set_gate(&pit_channels[2], val & 1); + pit_set_gate(pit, 2, val & 1); } static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) { int out; - out = pit_get_out(&pit_channels[2], qemu_get_clock(vm_clock)); + out = pit_get_out(pit, 2, qemu_get_clock(vm_clock)); dummy_refresh_clock ^= 1; - return (speaker_data_on << 1) | pit_channels[2].gate | (out << 5) | + return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) | (dummy_refresh_clock << 4); } +void ioport_set_a20(int enable) +{ + /* XXX: send to all CPUs ? */ + cpu_x86_set_a20(first_cpu, enable); +} + +int ioport_get_a20(void) +{ + return ((first_cpu->a20_mask >> 20) & 1); +} + +static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) +{ + ioport_set_a20((val >> 1) & 1); + /* XXX: bit 0 is fast reset */ +} + +static uint32_t ioport92_read(void *opaque, uint32_t addr) +{ + return ioport_get_a20() << 1; +} + /***********************************************************/ /* Bochs BIOS debug ports */ void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) { + static const char shutdown_str[8] = "Shutdown"; + static int shutdown_index = 0; + switch(addr) { /* Bochs BIOS messages */ case 0x400: @@ -194,6 +330,18 @@ void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) fprintf(stderr, "%c", val); #endif break; + case 0x8900: + /* same as Bochs power off */ + if (val == shutdown_str[shutdown_index]) { + shutdown_index++; + if (shutdown_index == 8) { + shutdown_index = 0; + qemu_system_shutdown_request(); + } + } else { + shutdown_index = 0; + } + break; /* LGPL'ed VGA BIOS messages */ case 0x501: @@ -215,6 +363,7 @@ void bochs_bios_init(void) register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); + register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); @@ -229,7 +378,7 @@ int load_kernel(const char *filename, uint8_t *addr, int fd, size; int setup_sects; - fd = open(filename, O_RDONLY); + fd = open(filename, O_RDONLY | O_BINARY); if (fd < 0) return -1; @@ -254,49 +403,263 @@ int load_kernel(const char *filename, uint8_t *addr, return -1; } +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + cpu_reset(env); +} + +/*************************************************/ + +static void putb(uint8_t **pp, int val) +{ + uint8_t *q; + q = *pp; + *q++ = val; + *pp = q; +} + +static void putstr(uint8_t **pp, const char *str) +{ + uint8_t *q; + q = *pp; + while (*str) + *q++ = *str++; + *pp = q; +} + +static void putle16(uint8_t **pp, int val) +{ + uint8_t *q; + q = *pp; + *q++ = val; + *q++ = val >> 8; + *pp = q; +} + +static void putle32(uint8_t **pp, int val) +{ + uint8_t *q; + q = *pp; + *q++ = val; + *q++ = val >> 8; + *q++ = val >> 16; + *q++ = val >> 24; + *pp = q; +} + +static int mpf_checksum(const uint8_t *data, int len) +{ + int sum, i; + sum = 0; + for(i = 0; i < len; i++) + sum += data[i]; + return sum & 0xff; +} + +/* Build the Multi Processor table in the BIOS. Same values as Bochs. */ +static void bios_add_mptable(uint8_t *bios_data) +{ + uint8_t *mp_config_table, *q, *float_pointer_struct; + int ioapic_id, offset, i, len; + + if (smp_cpus <= 1) + return; + + mp_config_table = bios_data + 0xcc00; + q = mp_config_table; + putstr(&q, "PCMP"); /* "PCMP signature */ + putle16(&q, 0); /* table length (patched later) */ + putb(&q, 4); /* spec rev */ + putb(&q, 0); /* checksum (patched later) */ + putstr(&q, "QEMUCPU "); /* OEM id */ + putstr(&q, "0.1 "); /* vendor id */ + putle32(&q, 0); /* OEM table ptr */ + putle16(&q, 0); /* OEM table size */ + putle16(&q, 20); /* entry count */ + putle32(&q, 0xfee00000); /* local APIC addr */ + putle16(&q, 0); /* ext table length */ + putb(&q, 0); /* ext table checksum */ + putb(&q, 0); /* reserved */ + + for(i = 0; i < smp_cpus; i++) { + putb(&q, 0); /* entry type = processor */ + putb(&q, i); /* APIC id */ + putb(&q, 0x11); /* local APIC version number */ + if (i == 0) + putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */ + else + putb(&q, 1); /* cpu flags: enabled */ + putb(&q, 0); /* cpu signature */ + putb(&q, 6); + putb(&q, 0); + putb(&q, 0); + putle16(&q, 0x201); /* feature flags */ + putle16(&q, 0); + + putle16(&q, 0); /* reserved */ + putle16(&q, 0); + putle16(&q, 0); + putle16(&q, 0); + } + + /* isa bus */ + putb(&q, 1); /* entry type = bus */ + putb(&q, 0); /* bus ID */ + putstr(&q, "ISA "); + + /* ioapic */ + ioapic_id = smp_cpus; + putb(&q, 2); /* entry type = I/O APIC */ + putb(&q, ioapic_id); /* apic ID */ + putb(&q, 0x11); /* I/O APIC version number */ + putb(&q, 1); /* enable */ + putle32(&q, 0xfec00000); /* I/O APIC addr */ + + /* irqs */ + for(i = 0; i < 16; i++) { + putb(&q, 3); /* entry type = I/O interrupt */ + putb(&q, 0); /* interrupt type = vectored interrupt */ + putb(&q, 0); /* flags: po=0, el=0 */ + putb(&q, 0); + putb(&q, 0); /* source bus ID = ISA */ + putb(&q, i); /* source bus IRQ */ + putb(&q, ioapic_id); /* dest I/O APIC ID */ + putb(&q, i); /* dest I/O APIC interrupt in */ + } + /* patch length */ + len = q - mp_config_table; + mp_config_table[4] = len; + mp_config_table[5] = len >> 8; + + mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table); + + /* align to 16 */ + offset = q - bios_data; + offset = (offset + 15) & ~15; + float_pointer_struct = bios_data + offset; + + /* floating pointer structure */ + q = float_pointer_struct; + putstr(&q, "_MP_"); + /* pointer to MP config table */ + putle32(&q, mp_config_table - bios_data + 0x000f0000); + + putb(&q, 1); /* length in 16 byte units */ + putb(&q, 4); /* MP spec revision */ + putb(&q, 0); /* checksum (patched later) */ + putb(&q, 0); /* MP feature byte 1 */ + + putb(&q, 0); + putb(&q, 0); + putb(&q, 0); + putb(&q, 0); + float_pointer_struct[10] = + -mpf_checksum(float_pointer_struct, q - float_pointer_struct); +} + + static const int ide_iobase[2] = { 0x1f0, 0x170 }; static const int ide_iobase2[2] = { 0x3f6, 0x376 }; static const int ide_irq[2] = { 14, 15 }; #define NE2000_NB_MAX 6 -static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; +static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; +static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; +static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; + +static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; +static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; + /* PC hardware initialisation */ -void pc_init(int ram_size, int vga_ram_size, int boot_device, - DisplayState *ds, const char **fd_filename, int snapshot, - const char *kernel_filename, const char *kernel_cmdline, - const char *initrd_filename) +static void pc_init1(int ram_size, int vga_ram_size, int boot_device, + DisplayState *ds, const char **fd_filename, int snapshot, + const char *kernel_filename, const char *kernel_cmdline, + const char *initrd_filename, + int pci_enabled) { char buf[1024]; - int ret, linux_boot, initrd_size, i, nb_nics1, fd; + int ret, linux_boot, initrd_size, i, nb_nics1; + unsigned long bios_offset, vga_bios_offset; + int bios_size, isa_bios_size; + PCIBus *pci_bus; + CPUState *env; linux_boot = (kernel_filename != NULL); + /* init CPUs */ + for(i = 0; i < smp_cpus; i++) { + env = cpu_init(); + if (i != 0) + env->hflags |= HF_HALTED_MASK; + if (smp_cpus > 1) { + /* XXX: enable it in all cases */ + env->cpuid_features |= CPUID_APIC; + } + register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); + qemu_register_reset(main_cpu_reset, env); + if (pci_enabled) { + apic_init(env); + } + } + /* allocate RAM */ cpu_register_physical_memory(0, ram_size, 0); /* BIOS load */ + bios_offset = ram_size + vga_ram_size; + vga_bios_offset = bios_offset + 256 * 1024; + snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); - ret = load_image(buf, phys_ram_base + 0x000f0000); - if (ret != 0x10000) { + bios_size = get_image_size(buf); + if (bios_size <= 0 || + (bios_size % 65536) != 0 || + bios_size > (256 * 1024)) { + goto bios_error; + } + ret = load_image(buf, phys_ram_base + bios_offset); + if (ret != bios_size) { + bios_error: fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf); exit(1); } - + if (bios_size == 65536) { + bios_add_mptable(phys_ram_base + bios_offset); + } + /* VGA BIOS load */ - snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); - ret = load_image(buf, phys_ram_base + 0x000c0000); + if (cirrus_vga_enabled) { + snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); + } else { + snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); + } + ret = load_image(buf, phys_ram_base + vga_bios_offset); /* setup basic memory access */ - cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM); - cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM); + cpu_register_physical_memory(0xc0000, 0x10000, + vga_bios_offset | IO_MEM_ROM); + + /* map the last 128KB of the BIOS in ISA space */ + isa_bios_size = bios_size; + if (isa_bios_size > (128 * 1024)) + isa_bios_size = 128 * 1024; + cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, + IO_MEM_UNASSIGNED); + cpu_register_physical_memory(0x100000 - isa_bios_size, + isa_bios_size, + (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); + /* map all the bios at the top of memory */ + cpu_register_physical_memory((uint32_t)(-bios_size), + bios_size, bios_offset | IO_MEM_ROM); bochs_bios_init(); if (linux_boot) { uint8_t bootsect[512]; + uint8_t old_bootsect[512]; if (bs_table[0] == NULL) { fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n"); @@ -310,6 +673,11 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device, exit(1); } + if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) { + /* copy the MSDOS partition table */ + memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40); + } + bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); /* now we can load the kernel */ @@ -345,43 +713,152 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device, stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); } + if (pci_enabled) { + pci_bus = i440fx_init(); + piix3_init(pci_bus); + } else { + pci_bus = NULL; + } + /* init basic PC hardware */ register_ioport_write(0x80, 1, 1, ioport80_write, NULL); - vga_initialize(ds, phys_ram_base + ram_size, ram_size, - vga_ram_size); + register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); + + if (cirrus_vga_enabled) { + if (pci_enabled) { + pci_cirrus_vga_init(pci_bus, + ds, phys_ram_base + ram_size, ram_size, + vga_ram_size); + } else { + isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, + vga_ram_size); + } + } else { + vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size, + vga_ram_size, 0, 0); + } rtc_state = rtc_init(0x70, 8); register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL); register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL); - pic_init(); - pit_init(0x40, 0); + register_ioport_read(0x92, 1, 1, ioport92_read, NULL); + register_ioport_write(0x92, 1, 1, ioport92_write, NULL); - fd = serial_open_device(); - serial_init(0x3f8, 4, fd); + if (pci_enabled) { + ioapic = ioapic_init(); + } + isa_pic = pic_init(pic_irq_request, first_cpu); + pit = pit_init(0x40, 0); + if (pci_enabled) { + pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); + } - nb_nics1 = nb_nics; - if (nb_nics1 > NE2000_NB_MAX) - nb_nics1 = NE2000_NB_MAX; - for(i = 0; i < nb_nics1; i++) { - ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]); + for(i = 0; i < MAX_SERIAL_PORTS; i++) { + if (serial_hds[i]) { + serial_init(serial_io[i], serial_irq[i], serial_hds[i]); + } } - for(i = 0; i < 2; i++) { - ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], - bs_table[2 * i], bs_table[2 * i + 1]); + for(i = 0; i < MAX_PARALLEL_PORTS; i++) { + if (parallel_hds[i]) { + parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]); + } + } + + if (pci_enabled) { + for(i = 0; i < nb_nics; i++) { + pci_ne2000_init(pci_bus, &nd_table[i]); + } + pci_piix3_ide_init(pci_bus, bs_table); + } else { + nb_nics1 = nb_nics; + if (nb_nics1 > NE2000_NB_MAX) + nb_nics1 = NE2000_NB_MAX; + for(i = 0; i < nb_nics1; i++) { + isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]); + } + + for(i = 0; i < 2; i++) { + isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], + bs_table[2 * i], bs_table[2 * i + 1]); + } } - kbd_init(); - DMA_init(); -#ifndef _WIN32 - /* no audio supported yet for win32 */ - AUD_init(); - SB16_init(); + kbd_init(); + DMA_init(0); + + if (audio_enabled) { + AudioState *audio; + + audio = AUD_init(); + if (audio) { + if (sb16_enabled) + SB16_init (audio); +#ifdef CONFIG_ADLIB + if (adlib_enabled) + Adlib_init (audio); +#endif +#ifdef CONFIG_GUS + if (gus_enabled) + GUS_init (audio); #endif + if (pci_enabled && es1370_enabled) + es1370_init (pci_bus, audio); + } + } floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); - cmos_init(ram_size, boot_device); + cmos_init(ram_size, boot_device, bs_table); + + if (pci_enabled && usb_enabled) { + usb_uhci_init(pci_bus, usb_root_ports); + usb_attach(usb_root_ports[0], vm_usb_hub); + } + + /* must be done after all PCI devices are instanciated */ + /* XXX: should be done in the Bochs BIOS */ + if (pci_enabled) { + pci_bios_init(); + } +} + +static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, + DisplayState *ds, const char **fd_filename, + int snapshot, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename) +{ + pc_init1(ram_size, vga_ram_size, boot_device, + ds, fd_filename, snapshot, + kernel_filename, kernel_cmdline, + initrd_filename, 1); } + +static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, + DisplayState *ds, const char **fd_filename, + int snapshot, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename) +{ + pc_init1(ram_size, vga_ram_size, boot_device, + ds, fd_filename, snapshot, + kernel_filename, kernel_cmdline, + initrd_filename, 0); +} + +QEMUMachine pc_machine = { + "pc", + "Standard PC", + pc_init_pci, +}; + +QEMUMachine isapc_machine = { + "isapc", + "ISA-only PC", + pc_init_isa, +};