X-Git-Url: https://vcs.maemo.org/git/?a=blobdiff_plain;f=hw%2Farm_pic.c;h=7f4a694d99e220d5c552b3ca40b92c0a60d0451d;hb=cd346349b45ef056f138a184f660b8c34c3213cc;hp=fbc2d67d0a08ab1defb716679570bdc826cf5de5;hpb=cdbdb648b7c2867f0bb7dce27efb1986f770dedb;p=qemu diff --git a/hw/arm_pic.c b/hw/arm_pic.c index fbc2d67..7f4a694 100644 --- a/hw/arm_pic.c +++ b/hw/arm_pic.c @@ -1,4 +1,4 @@ -/* +/* * Generic ARM Programmable Interrupt Controller support. * * Copyright (c) 2006 CodeSourcery. @@ -11,11 +11,6 @@ #include "arm_pic.h" /* Stub functions for hardware that doesn't exist. */ -void pic_set_irq(int irq, int level) -{ - cpu_abort(cpu_single_env, "pic_set_irq"); -} - void pic_info(void) { } @@ -25,49 +20,29 @@ void irq_info(void) } -void pic_set_irq_new(void *opaque, int irq, int level) -{ - arm_pic_handler *p = (arm_pic_handler *)opaque; - /* Call the real handler. */ - (*p)(opaque, irq, level); -} - -/* Model the IRQ/FIQ CPU interrupt lines as a two input interrupt controller. - Input 0 is IRQ and input 1 is FIQ. */ -typedef struct -{ - arm_pic_handler handler; - CPUState *cpu_env; -} arm_pic_cpu_state; - +/* Input 0 is IRQ and input 1 is FIQ. */ static void arm_pic_cpu_handler(void *opaque, int irq, int level) { - arm_pic_cpu_state *s = (arm_pic_cpu_state *)opaque; + CPUState *env = (CPUState *)opaque; switch (irq) { case ARM_PIC_CPU_IRQ: if (level) - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); + cpu_interrupt(env, CPU_INTERRUPT_HARD); else - cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_HARD); + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); break; case ARM_PIC_CPU_FIQ: if (level) - cpu_interrupt(s->cpu_env, CPU_INTERRUPT_FIQ); + cpu_interrupt(env, CPU_INTERRUPT_FIQ); else - cpu_reset_interrupt(s->cpu_env, CPU_INTERRUPT_FIQ); + cpu_reset_interrupt(env, CPU_INTERRUPT_FIQ); break; default: - cpu_abort(s->cpu_env, "arm_pic_cpu_handler: Bad interrput line %d\n", - irq); + cpu_abort(env, "arm_pic_cpu_handler: Bad interrput line %d\n", irq); } } -void *arm_pic_init_cpu(CPUState *env) +qemu_irq *arm_pic_init_cpu(CPUState *env) { - arm_pic_cpu_state *s; - - s = (arm_pic_cpu_state *)malloc(sizeof(arm_pic_cpu_state)); - s->handler = arm_pic_cpu_handler; - s->cpu_env = env; - return s; + return qemu_allocate_irqs(arm_pic_cpu_handler, env, 2); }