ESP PIO mode, 2k CDROM sector size (Blue Swirl)

[qemu] / vl.h

diff --git a/vl.h b/vl.h
index 3b2ccda..31d05b6 100644 (file)
--- a/vl.h
+++ b/vl.h
@@ -110,6 +110,13 @@ typedef void QEMUResetHandler(void *opaque);
 void qemu_register_reset(QEMUResetHandler *func, void *opaque);
 void qemu_system_reset_request(void);
 void qemu_system_shutdown_request(void);
+void qemu_system_powerdown_request(void);
+#if !defined(TARGET_SPARC)
+// Please implement a power failure function to signal the OS
+#define qemu_system_powerdown() do{}while(0)
+#else
+void qemu_system_powerdown(void);
+#endif
 
 void main_loop_wait(int timeout);
 
@@ -130,7 +137,9 @@ extern int win2k_install_hack;
 
 /* XXX: make it dynamic */
 #if defined (TARGET_PPC)
-#define BIOS_SIZE (512 * 1024)
+#define BIOS_SIZE ((512 + 32) * 1024)
+#elif defined(TARGET_MIPS)
+#define BIOS_SIZE (128 * 1024)
 #else
 #define BIOS_SIZE ((256 + 64) * 1024)
 #endif
@@ -460,6 +469,7 @@ typedef struct QEMUMachine {
 int qemu_register_machine(QEMUMachine *m);
 
 typedef void SetIRQFunc(void *opaque, int irq_num, int level);
+typedef void IRQRequestFunc(void *opaque, int level);
 
 /* ISA bus */
 
@@ -549,6 +559,7 @@ void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
 PCIBus *pci_prep_init(void);
 PCIBus *pci_grackle_init(uint32_t base);
 PCIBus *pci_pmac_init(void);
+PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
 
 /* openpic.c */
 typedef struct openpic_t openpic_t;
@@ -586,7 +597,8 @@ static inline void dpy_resize(DisplayState *s, int w, int h)
 }
 
 int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
-                   unsigned long vga_ram_offset, int vga_ram_size);
+                   unsigned long vga_ram_offset, int vga_ram_size,
+                   unsigned long vga_bios_offset, int vga_bios_size);
 void vga_update_display(void);
 void vga_invalidate_display(void);
 void vga_screen_dump(const char *filename);
@@ -678,16 +690,26 @@ ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
 
 /* i8259.c */
 
+typedef struct PicState2 PicState2;
+extern PicState2 *isa_pic;
 void pic_set_irq(int irq, int level);
 void pic_set_irq_new(void *opaque, int irq, int level);
-void pic_init(void);
-uint32_t pic_intack_read(CPUState *env);
+PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
+void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
+                          void *alt_irq_opaque);
+int pic_read_irq(PicState2 *s);
+void pic_update_irq(PicState2 *s);
+uint32_t pic_intack_read(PicState2 *s);
 void pic_info(void);
 void irq_info(void);
 
 /* APIC */
+typedef struct IOAPICState IOAPICState;
+
 int apic_init(CPUState *env);
 int apic_get_interrupt(CPUState *env);
+IOAPICState *ioapic_init(void);
+void ioapic_set_irq(void *opaque, int vector, int level);
 
 /* i8254.c */
 
@@ -708,6 +730,9 @@ extern QEMUMachine prep_machine;
 extern QEMUMachine core99_machine;
 extern QEMUMachine heathrow_machine;
 
+/* mips_r4k.c */
+extern QEMUMachine mips_machine;
+
 #ifdef TARGET_PPC
 ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
 #endif
@@ -753,9 +778,16 @@ void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2);
 SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
 void slavio_serial_ms_kbd_init(int base, int irq);
 
+/* slavio_misc.c */
+void *slavio_misc_init(uint32_t base, int irq);
+void slavio_set_power_fail(void *opaque, int power_failing);
+
 /* esp.c */
 void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
 
+/* sun4u.c */
+extern QEMUMachine sun4u_machine;
+
 /* NVRAM helpers */
 #include "hw/m48t59.h"
 
@@ -846,4 +878,6 @@ const char *readline_get_history(unsigned int index);
 void readline_start(const char *prompt, int is_password,
                     ReadLineFunc *readline_func, void *opaque);
 
+void kqemu_record_dump(void);
+
 #endif /* VL_H */