/*
* MIPS emulation helpers for qemu.
- *
+ *
* Copyright (c) 2004-2005 Jocelyn Mayer
*
* This library is free software; you can redistribute it and/or
#undef MEMSUFFIX
#endif
-#ifdef TARGET_MIPS64
+#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
#if TARGET_LONG_BITS > HOST_LONG_BITS
/* Those might call libgcc functions. */
void do_dsll (void)
T0 = T1;
}
#endif /* TARGET_LONG_BITS > HOST_LONG_BITS */
-#endif /* TARGET_MIPS64 */
+#endif /* TARGET_MIPSN32 || TARGET_MIPS64 */
/* 64 bits arithmetic for 32 bits hosts */
#if TARGET_LONG_BITS > HOST_LONG_BITS
static inline uint64_t get_HILO (void)
{
- return (env->HI << 32) | (uint32_t)env->LO;
+ return (env->HI[0][env->current_tc] << 32) | (uint32_t)env->LO[0][env->current_tc];
}
static inline void set_HILO (uint64_t HILO)
{
- env->LO = (int32_t)HILO;
- env->HI = (int32_t)(HILO >> 32);
+ env->LO[0][env->current_tc] = (int32_t)HILO;
+ env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
}
void do_mult (void)
{
/* 64bit datatypes because we may see overflow/underflow. */
if (T1 != 0) {
- env->LO = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
- env->HI = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
+ env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
+ env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
}
}
#endif
-#ifdef TARGET_MIPS64
+#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
void do_ddiv (void)
{
if (T1 != 0) {
lldiv_t res = lldiv((int64_t)T0, (int64_t)T1);
- env->LO = res.quot;
- env->HI = res.rem;
+ env->LO[0][env->current_tc] = res.quot;
+ env->HI[0][env->current_tc] = res.rem;
}
}
void do_ddivu (void)
{
if (T1 != 0) {
- env->LO = T0 / T1;
- env->HI = T0 % T1;
+ env->LO[0][env->current_tc] = T0 / T1;
+ env->HI[0][env->current_tc] = T0 % T1;
}
}
#endif
-#endif /* TARGET_MIPS64 */
+#endif /* TARGET_MIPSN32 || TARGET_MIPS64 */
-#if defined(CONFIG_USER_ONLY)
+#if defined(CONFIG_USER_ONLY)
void do_mfc0_random (void)
{
cpu_abort(env, "mfc0 random\n");
cpu_abort(env, "mtc0 compare\n");
}
+void cpu_mips_start_count(CPUState *env)
+{
+ cpu_abort(env, "start count\n");
+}
+
+void cpu_mips_stop_count(CPUState *env)
+{
+ cpu_abort(env, "stop count\n");
+}
+
void cpu_mips_update_irq(CPUState *env)
{
cpu_abort(env, "mtc0 status / mtc0 cause\n");
void fpu_handle_exception(void)
{
#ifdef CONFIG_SOFTFLOAT
- int flags = get_float_exception_flags(&env->fp_status);
+ int flags = get_float_exception_flags(&env->fpu->fp_status);
unsigned int cpuflags = 0, enable, cause = 0;
- enable = GET_FP_ENABLE(env->fcr31);
+ enable = GET_FP_ENABLE(env->fpu->fcr31);
- /* determine current flags */
+ /* determine current flags */
if (flags & float_flag_invalid) {
cpuflags |= FP_INVALID;
cause |= FP_INVALID & enable;
}
if (flags & float_flag_divbyzero) {
- cpuflags |= FP_DIV0;
+ cpuflags |= FP_DIV0;
cause |= FP_DIV0 & enable;
}
if (flags & float_flag_overflow) {
- cpuflags |= FP_OVERFLOW;
+ cpuflags |= FP_OVERFLOW;
cause |= FP_OVERFLOW & enable;
}
if (flags & float_flag_underflow) {
- cpuflags |= FP_UNDERFLOW;
+ cpuflags |= FP_UNDERFLOW;
cause |= FP_UNDERFLOW & enable;
}
if (flags & float_flag_inexact) {
- cpuflags |= FP_INEXACT;
+ cpuflags |= FP_INEXACT;
cause |= FP_INEXACT & enable;
}
- SET_FP_FLAGS(env->fcr31, cpuflags);
- SET_FP_CAUSE(env->fcr31, cause);
+ SET_FP_FLAGS(env->fpu->fcr31, cpuflags);
+ SET_FP_CAUSE(env->fpu->fcr31, cause);
#else
- SET_FP_FLAGS(env->fcr31, 0);
- SET_FP_CAUSE(env->fcr31, 0);
+ SET_FP_FLAGS(env->fpu->fcr31, 0);
+ SET_FP_CAUSE(env->fpu->fcr31, 0);
#endif
}
{
/* Flush qemu's TLB and discard all shadowed entries. */
tlb_flush (env, flush_global);
- env->tlb_in_use = env->nb_tlb;
+ env->tlb->tlb_in_use = env->tlb->nb_tlb;
}
static void r4k_mips_tlb_flush_extra (CPUState *env, int first)
{
/* Discard entries from env->tlb[first] onwards. */
- while (env->tlb_in_use > first) {
- r4k_invalidate_tlb(env, --env->tlb_in_use, 0);
+ while (env->tlb->tlb_in_use > first) {
+ r4k_invalidate_tlb(env, --env->tlb->tlb_in_use, 0);
}
}
r4k_tlb_t *tlb;
/* XXX: detect conflicting TLBs and raise a MCHECK exception when needed */
- tlb = &env->mmu.r4k.tlb[idx];
+ tlb = &env->tlb->mmu.r4k.tlb[idx];
tlb->VPN = env->CP0_EntryHi & (TARGET_PAGE_MASK << 1);
-#ifdef TARGET_MIPS64
+#if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
tlb->VPN &= env->SEGMask;
#endif
tlb->ASID = env->CP0_EntryHi & 0xFF;
/* Discard cached TLB entries. We could avoid doing this if the
tlbwi is just upgrading access permissions on the current entry;
that might be a further win. */
- r4k_mips_tlb_flush_extra (env, env->nb_tlb);
+ r4k_mips_tlb_flush_extra (env, env->tlb->nb_tlb);
- r4k_invalidate_tlb(env, env->CP0_Index % env->nb_tlb, 0);
- r4k_fill_tlb(env->CP0_Index % env->nb_tlb);
+ r4k_invalidate_tlb(env, env->CP0_Index % env->tlb->nb_tlb, 0);
+ r4k_fill_tlb(env->CP0_Index % env->tlb->nb_tlb);
}
void r4k_do_tlbwr (void)
int i;
ASID = env->CP0_EntryHi & 0xFF;
- for (i = 0; i < env->nb_tlb; i++) {
- tlb = &env->mmu.r4k.tlb[i];
+ for (i = 0; i < env->tlb->nb_tlb; i++) {
+ tlb = &env->tlb->mmu.r4k.tlb[i];
/* 1k pages are not supported. */
mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1);
tag = env->CP0_EntryHi & ~mask;
break;
}
}
- if (i == env->nb_tlb) {
+ if (i == env->tlb->nb_tlb) {
/* No match. Discard any shadow entries, if any of them match. */
- for (i = env->nb_tlb; i < env->tlb_in_use; i++) {
- tlb = &env->mmu.r4k.tlb[i];
+ for (i = env->tlb->nb_tlb; i < env->tlb->tlb_in_use; i++) {
+ tlb = &env->tlb->mmu.r4k.tlb[i];
/* 1k pages are not supported. */
mask = tlb->PageMask | ~(TARGET_PAGE_MASK << 1);
tag = env->CP0_EntryHi & ~mask;
uint8_t ASID;
ASID = env->CP0_EntryHi & 0xFF;
- tlb = &env->mmu.r4k.tlb[env->CP0_Index % env->nb_tlb];
+ tlb = &env->tlb->mmu.r4k.tlb[env->CP0_Index % env->tlb->nb_tlb];
/* If this will change the current ASID, flush qemu's TLB. */
if (ASID != tlb->ASID)
cpu_mips_tlb_flush (env, 1);
- r4k_mips_tlb_flush_extra(env, env->nb_tlb);
+ r4k_mips_tlb_flush_extra(env, env->tlb->nb_tlb);
env->CP0_EntryHi = tlb->VPN | tlb->ASID;
env->CP0_PageMask = tlb->PageMask;
void debug_pre_eret (void)
{
fprintf(logfile, "ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
- env->PC, env->CP0_EPC);
+ env->PC[env->current_tc], env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
void debug_post_eret (void)
{
fprintf(logfile, " => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
- env->PC, env->CP0_EPC);
+ env->PC[env->current_tc], env->CP0_EPC);
if (env->CP0_Status & (1 << CP0St_ERL))
fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC);
if (env->hflags & MIPS_HFLAG_DM)
function /= 2;
switch (function) {
case 2: /* TODO: char inbyte(int waitflag); */
- if (env->gpr[4] == 0)
- env->gpr[2] = -1;
+ if (env->gpr[4][env->current_tc] == 0)
+ env->gpr[2][env->current_tc] = -1;
/* Fall through */
case 11: /* TODO: char inbyte (void); */
- env->gpr[2] = -1;
+ env->gpr[2][env->current_tc] = -1;
break;
case 3:
case 12:
- printf("%c", (char)(env->gpr[4] & 0xFF));
+ printf("%c", (char)(env->gpr[4][env->current_tc] & 0xFF));
break;
case 17:
break;
case 158:
{
- unsigned char *fmt = (void *)(unsigned long)env->gpr[4];
+ unsigned char *fmt = (void *)(unsigned long)env->gpr[4][env->current_tc];
printf("%s", fmt);
}
break;
}
}
-#if !defined(CONFIG_USER_ONLY)
+#if !defined(CONFIG_USER_ONLY)
static void do_unaligned_access (target_ulong addr, int is_write, int is_user, void *retaddr);
#define FLOAT_ONE64 (0x3ffULL << 52)
#define FLOAT_TWO32 (1 << 30)
#define FLOAT_TWO64 (1ULL << 62)
+#define FLOAT_QNAN32 0x7fbfffff
+#define FLOAT_QNAN64 0x7ff7ffffffffffffULL
+#define FLOAT_SNAN32 0x7fffffff
+#define FLOAT_SNAN64 0x7fffffffffffffffULL
/* convert MIPS rounding mode in FCR31 to IEEE library */
unsigned int ieee_rm[] = {
};
#define RESTORE_ROUNDING_MODE \
- set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
+ set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
-void do_ctc1 (void)
+void do_cfc1 (int reg)
{
- switch(T1) {
+ switch (reg) {
+ case 0:
+ T0 = (int32_t)env->fpu->fcr0;
+ break;
+ case 25:
+ T0 = ((env->fpu->fcr31 >> 24) & 0xfe) | ((env->fpu->fcr31 >> 23) & 0x1);
+ break;
+ case 26:
+ T0 = env->fpu->fcr31 & 0x0003f07c;
+ break;
+ case 28:
+ T0 = (env->fpu->fcr31 & 0x00000f83) | ((env->fpu->fcr31 >> 22) & 0x4);
+ break;
+ default:
+ T0 = (int32_t)env->fpu->fcr31;
+ break;
+ }
+}
+
+void do_ctc1 (int reg)
+{
+ switch(reg) {
case 25:
if (T0 & 0xffffff00)
return;
- env->fcr31 = (env->fcr31 & 0x017fffff) | ((T0 & 0xfe) << 24) |
+ env->fpu->fcr31 = (env->fpu->fcr31 & 0x017fffff) | ((T0 & 0xfe) << 24) |
((T0 & 0x1) << 23);
break;
case 26:
if (T0 & 0x007c0000)
return;
- env->fcr31 = (env->fcr31 & 0xfffc0f83) | (T0 & 0x0003f07c);
+ env->fpu->fcr31 = (env->fpu->fcr31 & 0xfffc0f83) | (T0 & 0x0003f07c);
break;
case 28:
if (T0 & 0x007c0000)
return;
- env->fcr31 = (env->fcr31 & 0xfefff07c) | (T0 & 0x00000f83) |
+ env->fpu->fcr31 = (env->fpu->fcr31 & 0xfefff07c) | (T0 & 0x00000f83) |
((T0 & 0x4) << 22);
break;
case 31:
if (T0 & 0x007c0000)
return;
- env->fcr31 = T0;
+ env->fpu->fcr31 = T0;
break;
default:
return;
}
/* set rounding mode */
RESTORE_ROUNDING_MODE;
- set_float_exception_flags(0, &env->fp_status);
- if ((GET_FP_ENABLE(env->fcr31) | 0x20) & GET_FP_CAUSE(env->fcr31))
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ if ((GET_FP_ENABLE(env->fpu->fcr31) | 0x20) & GET_FP_CAUSE(env->fpu->fcr31))
do_raise_exception(EXCP_FPE);
}
inline void update_fcr31(void)
{
- int tmp = ieee_ex_to_mips(get_float_exception_flags(&env->fp_status));
+ int tmp = ieee_ex_to_mips(get_float_exception_flags(&env->fpu->fp_status));
- SET_FP_CAUSE(env->fcr31, tmp);
- if (GET_FP_ENABLE(env->fcr31) & tmp)
+ SET_FP_CAUSE(env->fpu->fcr31, tmp);
+ if (GET_FP_ENABLE(env->fpu->fcr31) & tmp)
do_raise_exception(EXCP_FPE);
else
- UPDATE_FP_FLAGS(env->fcr31, tmp);
+ UPDATE_FP_FLAGS(env->fpu->fcr31, tmp);
}
#define FLOAT_OP(name, p) void do_float_##name##_##p(void)
FLOAT_OP(cvtd, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float32_to_float64(FST0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float32_to_float64(FST0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvtd, w)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = int32_to_float64(WT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = int32_to_float64(WT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvtd, l)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = int64_to_float64(DT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = int64_to_float64(DT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvtl, d)
{
- set_float_exception_flags(0, &env->fp_status);
- DT2 = float64_to_int64(FDT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ DT2 = float64_to_int64(FDT0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(cvtl, s)
{
- set_float_exception_flags(0, &env->fp_status);
- DT2 = float32_to_int64(FST0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ DT2 = float32_to_int64(FST0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(cvtps, pw)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = int32_to_float32(WT0, &env->fp_status);
- FSTH2 = int32_to_float32(WTH0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = int32_to_float32(WT0, &env->fpu->fp_status);
+ FSTH2 = int32_to_float32(WTH0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvtpw, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- WT2 = float32_to_int32(FST0, &env->fp_status);
- WTH2 = float32_to_int32(FSTH0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ WT2 = float32_to_int32(FST0, &env->fpu->fp_status);
+ WTH2 = float32_to_int32(FSTH0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(cvts, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float64_to_float32(FDT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float64_to_float32(FDT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvts, w)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = int32_to_float32(WT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = int32_to_float32(WT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvts, l)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = int64_to_float32(DT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = int64_to_float32(DT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(cvts, pl)
{
- set_float_exception_flags(0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
WT2 = WT0;
update_fcr31();
}
FLOAT_OP(cvts, pu)
{
- set_float_exception_flags(0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
WT2 = WTH0;
update_fcr31();
}
FLOAT_OP(cvtw, s)
{
- set_float_exception_flags(0, &env->fp_status);
- WT2 = float32_to_int32(FST0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ WT2 = float32_to_int32(FST0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(cvtw, d)
{
- set_float_exception_flags(0, &env->fp_status);
- WT2 = float64_to_int32(FDT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ WT2 = float64_to_int32(FDT0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(roundl, d)
{
- set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
- DT2 = float64_round_to_int(FDT0, &env->fp_status);
+ set_float_rounding_mode(float_round_nearest_even, &env->fpu->fp_status);
+ DT2 = float64_to_int64(FDT0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(roundl, s)
{
- set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
- DT2 = float32_round_to_int(FST0, &env->fp_status);
+ set_float_rounding_mode(float_round_nearest_even, &env->fpu->fp_status);
+ DT2 = float32_to_int64(FST0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(roundw, d)
{
- set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
- WT2 = float64_round_to_int(FDT0, &env->fp_status);
+ set_float_rounding_mode(float_round_nearest_even, &env->fpu->fp_status);
+ WT2 = float64_to_int32(FDT0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(roundw, s)
{
- set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
- WT2 = float32_round_to_int(FST0, &env->fp_status);
+ set_float_rounding_mode(float_round_nearest_even, &env->fpu->fp_status);
+ WT2 = float32_to_int32(FST0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(truncl, d)
{
- DT2 = float64_to_int64_round_to_zero(FDT0, &env->fp_status);
+ DT2 = float64_to_int64_round_to_zero(FDT0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(truncl, s)
{
- DT2 = float32_to_int64_round_to_zero(FST0, &env->fp_status);
+ DT2 = float32_to_int64_round_to_zero(FST0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(truncw, d)
{
- WT2 = float64_to_int32_round_to_zero(FDT0, &env->fp_status);
+ WT2 = float64_to_int32_round_to_zero(FDT0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(truncw, s)
{
- WT2 = float32_to_int32_round_to_zero(FST0, &env->fp_status);
+ WT2 = float32_to_int32_round_to_zero(FST0, &env->fpu->fp_status);
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(ceill, d)
{
- set_float_rounding_mode(float_round_up, &env->fp_status);
- DT2 = float64_round_to_int(FDT0, &env->fp_status);
+ set_float_rounding_mode(float_round_up, &env->fpu->fp_status);
+ DT2 = float64_to_int64(FDT0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(ceill, s)
{
- set_float_rounding_mode(float_round_up, &env->fp_status);
- DT2 = float32_round_to_int(FST0, &env->fp_status);
+ set_float_rounding_mode(float_round_up, &env->fpu->fp_status);
+ DT2 = float32_to_int64(FST0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(ceilw, d)
{
- set_float_rounding_mode(float_round_up, &env->fp_status);
- WT2 = float64_round_to_int(FDT0, &env->fp_status);
+ set_float_rounding_mode(float_round_up, &env->fpu->fp_status);
+ WT2 = float64_to_int32(FDT0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(ceilw, s)
{
- set_float_rounding_mode(float_round_up, &env->fp_status);
- WT2 = float32_round_to_int(FST0, &env->fp_status);
+ set_float_rounding_mode(float_round_up, &env->fpu->fp_status);
+ WT2 = float32_to_int32(FST0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(floorl, d)
{
- set_float_rounding_mode(float_round_down, &env->fp_status);
- DT2 = float64_round_to_int(FDT0, &env->fp_status);
+ set_float_rounding_mode(float_round_down, &env->fpu->fp_status);
+ DT2 = float64_to_int64(FDT0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(floorl, s)
{
- set_float_rounding_mode(float_round_down, &env->fp_status);
- DT2 = float32_round_to_int(FST0, &env->fp_status);
+ set_float_rounding_mode(float_round_down, &env->fpu->fp_status);
+ DT2 = float32_to_int64(FST0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- DT2 = 0x7fffffffffffffffULL;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ DT2 = FLOAT_SNAN64;
}
FLOAT_OP(floorw, d)
{
- set_float_rounding_mode(float_round_down, &env->fp_status);
- WT2 = float64_round_to_int(FDT0, &env->fp_status);
+ set_float_rounding_mode(float_round_down, &env->fpu->fp_status);
+ WT2 = float64_to_int32(FDT0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
FLOAT_OP(floorw, s)
{
- set_float_rounding_mode(float_round_down, &env->fp_status);
- WT2 = float32_round_to_int(FST0, &env->fp_status);
+ set_float_rounding_mode(float_round_down, &env->fpu->fp_status);
+ WT2 = float32_to_int32(FST0, &env->fpu->fp_status);
RESTORE_ROUNDING_MODE;
update_fcr31();
- if (GET_FP_CAUSE(env->fcr31) & (FP_OVERFLOW | FP_INVALID))
- WT2 = 0x7fffffff;
+ if (GET_FP_CAUSE(env->fpu->fcr31) & (FP_OVERFLOW | FP_INVALID))
+ WT2 = FLOAT_SNAN32;
}
/* MIPS specific unary operations */
FLOAT_OP(recip, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float64_div(FLOAT_ONE64, FDT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float64_div(FLOAT_ONE64, FDT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(recip, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_div(FLOAT_ONE32, FST0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_div(FLOAT_ONE32, FST0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(rsqrt, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float64_sqrt(FDT0, &env->fp_status);
- FDT2 = float64_div(FLOAT_ONE64, FDT2, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float64_sqrt(FDT0, &env->fpu->fp_status);
+ FDT2 = float64_div(FLOAT_ONE64, FDT2, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(rsqrt, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_sqrt(FST0, &env->fp_status);
- FST2 = float32_div(FLOAT_ONE32, FST2, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_sqrt(FST0, &env->fpu->fp_status);
+ FST2 = float32_div(FLOAT_ONE32, FST2, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(recip1, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float64_div(FLOAT_ONE64, FDT0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float64_div(FLOAT_ONE64, FDT0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(recip1, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_div(FLOAT_ONE32, FST0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_div(FLOAT_ONE32, FST0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(recip1, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_div(FLOAT_ONE32, FST0, &env->fp_status);
- FSTH2 = float32_div(FLOAT_ONE32, FSTH0, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_div(FLOAT_ONE32, FST0, &env->fpu->fp_status);
+ FSTH2 = float32_div(FLOAT_ONE32, FSTH0, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(rsqrt1, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float64_sqrt(FDT0, &env->fp_status);
- FDT2 = float64_div(FLOAT_ONE64, FDT2, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float64_sqrt(FDT0, &env->fpu->fp_status);
+ FDT2 = float64_div(FLOAT_ONE64, FDT2, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(rsqrt1, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_sqrt(FST0, &env->fp_status);
- FST2 = float32_div(FLOAT_ONE32, FST2, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_sqrt(FST0, &env->fpu->fp_status);
+ FST2 = float32_div(FLOAT_ONE32, FST2, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(rsqrt1, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_sqrt(FST0, &env->fp_status);
- FSTH2 = float32_sqrt(FSTH0, &env->fp_status);
- FST2 = float32_div(FLOAT_ONE32, FST2, &env->fp_status);
- FSTH2 = float32_div(FLOAT_ONE32, FSTH2, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_sqrt(FST0, &env->fpu->fp_status);
+ FSTH2 = float32_sqrt(FSTH0, &env->fpu->fp_status);
+ FST2 = float32_div(FLOAT_ONE32, FST2, &env->fpu->fp_status);
+ FSTH2 = float32_div(FLOAT_ONE32, FSTH2, &env->fpu->fp_status);
update_fcr31();
}
#define FLOAT_BINOP(name) \
FLOAT_OP(name, d) \
{ \
- set_float_exception_flags(0, &env->fp_status); \
- FDT2 = float64_ ## name (FDT0, FDT1, &env->fp_status); \
- update_fcr31(); \
- if (GET_FP_CAUSE(env->fcr31) & FP_INVALID) \
- FDT2 = 0x7ff7ffffffffffffULL; \
- else if (GET_FP_CAUSE(env->fcr31) & FP_UNDERFLOW) { \
- if ((env->fcr31 & 0x3) == 0) \
- FDT2 &= FLOAT_SIGN64; \
- } \
+ set_float_exception_flags(0, &env->fpu->fp_status); \
+ FDT2 = float64_ ## name (FDT0, FDT1, &env->fpu->fp_status); \
+ update_fcr31(); \
+ if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) \
+ FDT2 = FLOAT_QNAN64; \
} \
FLOAT_OP(name, s) \
{ \
- set_float_exception_flags(0, &env->fp_status); \
- FST2 = float32_ ## name (FST0, FST1, &env->fp_status); \
- update_fcr31(); \
- if (GET_FP_CAUSE(env->fcr31) & FP_INVALID) \
- FST2 = 0x7fbfffff; \
- else if (GET_FP_CAUSE(env->fcr31) & FP_UNDERFLOW) { \
- if ((env->fcr31 & 0x3) == 0) \
- FST2 &= FLOAT_SIGN32; \
- } \
+ set_float_exception_flags(0, &env->fpu->fp_status); \
+ FST2 = float32_ ## name (FST0, FST1, &env->fpu->fp_status); \
+ update_fcr31(); \
+ if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) \
+ FST2 = FLOAT_QNAN32; \
} \
FLOAT_OP(name, ps) \
{ \
- set_float_exception_flags(0, &env->fp_status); \
- FST2 = float32_ ## name (FST0, FST1, &env->fp_status); \
- FSTH2 = float32_ ## name (FSTH0, FSTH1, &env->fp_status); \
+ set_float_exception_flags(0, &env->fpu->fp_status); \
+ FST2 = float32_ ## name (FST0, FST1, &env->fpu->fp_status); \
+ FSTH2 = float32_ ## name (FSTH0, FSTH1, &env->fpu->fp_status); \
update_fcr31(); \
- if (GET_FP_CAUSE(env->fcr31) & FP_INVALID) { \
- FST2 = 0x7fbfffff; \
- FSTH2 = 0x7fbfffff; \
- } else if (GET_FP_CAUSE(env->fcr31) & FP_UNDERFLOW) { \
- if ((env->fcr31 & 0x3) == 0) { \
- FST2 &= FLOAT_SIGN32; \
- FSTH2 &= FLOAT_SIGN32; \
- } \
+ if (GET_FP_CAUSE(env->fpu->fcr31) & FP_INVALID) { \
+ FST2 = FLOAT_QNAN32; \
+ FSTH2 = FLOAT_QNAN32; \
} \
}
FLOAT_BINOP(add)
/* MIPS specific binary operations */
FLOAT_OP(recip2, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float64_mul(FDT0, FDT2, &env->fp_status);
- FDT2 = float64_sub(FDT2, FLOAT_ONE64, &env->fp_status) ^ FLOAT_SIGN64;
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float64_mul(FDT0, FDT2, &env->fpu->fp_status);
+ FDT2 = float64_sub(FDT2, FLOAT_ONE64, &env->fpu->fp_status) ^ FLOAT_SIGN64;
update_fcr31();
}
FLOAT_OP(recip2, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_mul(FST0, FST2, &env->fp_status);
- FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fp_status) ^ FLOAT_SIGN32;
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
+ FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
update_fcr31();
}
FLOAT_OP(recip2, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_mul(FST0, FST2, &env->fp_status);
- FSTH2 = float32_mul(FSTH0, FSTH2, &env->fp_status);
- FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fp_status) ^ FLOAT_SIGN32;
- FSTH2 = float32_sub(FSTH2, FLOAT_ONE32, &env->fp_status) ^ FLOAT_SIGN32;
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
+ FSTH2 = float32_mul(FSTH0, FSTH2, &env->fpu->fp_status);
+ FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
+ FSTH2 = float32_sub(FSTH2, FLOAT_ONE32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
update_fcr31();
}
FLOAT_OP(rsqrt2, d)
{
- set_float_exception_flags(0, &env->fp_status);
- FDT2 = float64_mul(FDT0, FDT2, &env->fp_status);
- FDT2 = float64_sub(FDT2, FLOAT_ONE64, &env->fp_status);
- FDT2 = float64_div(FDT2, FLOAT_TWO64, &env->fp_status) ^ FLOAT_SIGN64;
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FDT2 = float64_mul(FDT0, FDT2, &env->fpu->fp_status);
+ FDT2 = float64_sub(FDT2, FLOAT_ONE64, &env->fpu->fp_status);
+ FDT2 = float64_div(FDT2, FLOAT_TWO64, &env->fpu->fp_status) ^ FLOAT_SIGN64;
update_fcr31();
}
FLOAT_OP(rsqrt2, s)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_mul(FST0, FST2, &env->fp_status);
- FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fp_status);
- FST2 = float32_div(FST2, FLOAT_TWO32, &env->fp_status) ^ FLOAT_SIGN32;
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
+ FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status);
+ FST2 = float32_div(FST2, FLOAT_TWO32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
update_fcr31();
}
FLOAT_OP(rsqrt2, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_mul(FST0, FST2, &env->fp_status);
- FSTH2 = float32_mul(FSTH0, FSTH2, &env->fp_status);
- FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fp_status);
- FSTH2 = float32_sub(FSTH2, FLOAT_ONE32, &env->fp_status);
- FST2 = float32_div(FST2, FLOAT_TWO32, &env->fp_status) ^ FLOAT_SIGN32;
- FSTH2 = float32_div(FSTH2, FLOAT_TWO32, &env->fp_status) ^ FLOAT_SIGN32;
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_mul(FST0, FST2, &env->fpu->fp_status);
+ FSTH2 = float32_mul(FSTH0, FSTH2, &env->fpu->fp_status);
+ FST2 = float32_sub(FST2, FLOAT_ONE32, &env->fpu->fp_status);
+ FSTH2 = float32_sub(FSTH2, FLOAT_ONE32, &env->fpu->fp_status);
+ FST2 = float32_div(FST2, FLOAT_TWO32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
+ FSTH2 = float32_div(FSTH2, FLOAT_TWO32, &env->fpu->fp_status) ^ FLOAT_SIGN32;
update_fcr31();
}
FLOAT_OP(addr, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_add (FST0, FSTH0, &env->fp_status);
- FSTH2 = float32_add (FST1, FSTH1, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_add (FST0, FSTH0, &env->fpu->fp_status);
+ FSTH2 = float32_add (FST1, FSTH1, &env->fpu->fp_status);
update_fcr31();
}
FLOAT_OP(mulr, ps)
{
- set_float_exception_flags(0, &env->fp_status);
- FST2 = float32_mul (FST0, FSTH0, &env->fp_status);
- FSTH2 = float32_mul (FST1, FSTH1, &env->fp_status);
+ set_float_exception_flags(0, &env->fpu->fp_status);
+ FST2 = float32_mul (FST0, FSTH0, &env->fpu->fp_status);
+ FSTH2 = float32_mul (FST1, FSTH1, &env->fpu->fp_status);
update_fcr31();
}
int c = cond; \
update_fcr31(); \
if (c) \
- SET_FP_COND(cc, env); \
+ SET_FP_COND(cc, env->fpu); \
else \
- CLEAR_FP_COND(cc, env); \
+ CLEAR_FP_COND(cc, env->fpu); \
} \
void do_cmpabs_d_ ## op (long cc) \
{ \
c = cond; \
update_fcr31(); \
if (c) \
- SET_FP_COND(cc, env); \
+ SET_FP_COND(cc, env->fpu); \
else \
- CLEAR_FP_COND(cc, env); \
+ CLEAR_FP_COND(cc, env->fpu); \
}
int float64_is_unordered(int sig, float64 a, float64 b STATUS_PARAM)
/* NOTE: the comma operator will make "cond" to eval to false,
* but float*_is_unordered() is still called. */
-FOP_COND_D(f, (float64_is_unordered(0, FDT1, FDT0, &env->fp_status), 0))
-FOP_COND_D(un, float64_is_unordered(0, FDT1, FDT0, &env->fp_status))
-FOP_COND_D(eq, !float64_is_unordered(0, FDT1, FDT0, &env->fp_status) && float64_eq(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(ueq, float64_is_unordered(0, FDT1, FDT0, &env->fp_status) || float64_eq(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(olt, !float64_is_unordered(0, FDT1, FDT0, &env->fp_status) && float64_lt(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(ult, float64_is_unordered(0, FDT1, FDT0, &env->fp_status) || float64_lt(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(ole, !float64_is_unordered(0, FDT1, FDT0, &env->fp_status) && float64_le(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(ule, float64_is_unordered(0, FDT1, FDT0, &env->fp_status) || float64_le(FDT0, FDT1, &env->fp_status))
+FOP_COND_D(f, (float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status), 0))
+FOP_COND_D(un, float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status))
+FOP_COND_D(eq, !float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status) && float64_eq(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(ueq, float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status) || float64_eq(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(olt, !float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status) && float64_lt(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(ult, float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status) || float64_lt(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(ole, !float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status) && float64_le(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(ule, float64_is_unordered(0, FDT1, FDT0, &env->fpu->fp_status) || float64_le(FDT0, FDT1, &env->fpu->fp_status))
/* NOTE: the comma operator will make "cond" to eval to false,
* but float*_is_unordered() is still called. */
-FOP_COND_D(sf, (float64_is_unordered(1, FDT1, FDT0, &env->fp_status), 0))
-FOP_COND_D(ngle,float64_is_unordered(1, FDT1, FDT0, &env->fp_status))
-FOP_COND_D(seq, !float64_is_unordered(1, FDT1, FDT0, &env->fp_status) && float64_eq(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(ngl, float64_is_unordered(1, FDT1, FDT0, &env->fp_status) || float64_eq(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(lt, !float64_is_unordered(1, FDT1, FDT0, &env->fp_status) && float64_lt(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(nge, float64_is_unordered(1, FDT1, FDT0, &env->fp_status) || float64_lt(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(le, !float64_is_unordered(1, FDT1, FDT0, &env->fp_status) && float64_le(FDT0, FDT1, &env->fp_status))
-FOP_COND_D(ngt, float64_is_unordered(1, FDT1, FDT0, &env->fp_status) || float64_le(FDT0, FDT1, &env->fp_status))
+FOP_COND_D(sf, (float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status), 0))
+FOP_COND_D(ngle,float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status))
+FOP_COND_D(seq, !float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status) && float64_eq(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(ngl, float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status) || float64_eq(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(lt, !float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status) && float64_lt(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(nge, float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status) || float64_lt(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(le, !float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status) && float64_le(FDT0, FDT1, &env->fpu->fp_status))
+FOP_COND_D(ngt, float64_is_unordered(1, FDT1, FDT0, &env->fpu->fp_status) || float64_le(FDT0, FDT1, &env->fpu->fp_status))
#define FOP_COND_S(op, cond) \
void do_cmp_s_ ## op (long cc) \
int c = cond; \
update_fcr31(); \
if (c) \
- SET_FP_COND(cc, env); \
+ SET_FP_COND(cc, env->fpu); \
else \
- CLEAR_FP_COND(cc, env); \
+ CLEAR_FP_COND(cc, env->fpu); \
} \
void do_cmpabs_s_ ## op (long cc) \
{ \
c = cond; \
update_fcr31(); \
if (c) \
- SET_FP_COND(cc, env); \
+ SET_FP_COND(cc, env->fpu); \
else \
- CLEAR_FP_COND(cc, env); \
+ CLEAR_FP_COND(cc, env->fpu); \
}
flag float32_is_unordered(int sig, float32 a, float32 b STATUS_PARAM)
/* NOTE: the comma operator will make "cond" to eval to false,
* but float*_is_unordered() is still called. */
-FOP_COND_S(f, (float32_is_unordered(0, FST1, FST0, &env->fp_status), 0))
-FOP_COND_S(un, float32_is_unordered(0, FST1, FST0, &env->fp_status))
-FOP_COND_S(eq, !float32_is_unordered(0, FST1, FST0, &env->fp_status) && float32_eq(FST0, FST1, &env->fp_status))
-FOP_COND_S(ueq, float32_is_unordered(0, FST1, FST0, &env->fp_status) || float32_eq(FST0, FST1, &env->fp_status))
-FOP_COND_S(olt, !float32_is_unordered(0, FST1, FST0, &env->fp_status) && float32_lt(FST0, FST1, &env->fp_status))
-FOP_COND_S(ult, float32_is_unordered(0, FST1, FST0, &env->fp_status) || float32_lt(FST0, FST1, &env->fp_status))
-FOP_COND_S(ole, !float32_is_unordered(0, FST1, FST0, &env->fp_status) && float32_le(FST0, FST1, &env->fp_status))
-FOP_COND_S(ule, float32_is_unordered(0, FST1, FST0, &env->fp_status) || float32_le(FST0, FST1, &env->fp_status))
+FOP_COND_S(f, (float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status), 0))
+FOP_COND_S(un, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status))
+FOP_COND_S(eq, !float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) && float32_eq(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(ueq, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) || float32_eq(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(olt, !float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) && float32_lt(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(ult, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) || float32_lt(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(ole, !float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) && float32_le(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(ule, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) || float32_le(FST0, FST1, &env->fpu->fp_status))
/* NOTE: the comma operator will make "cond" to eval to false,
* but float*_is_unordered() is still called. */
-FOP_COND_S(sf, (float32_is_unordered(1, FST1, FST0, &env->fp_status), 0))
-FOP_COND_S(ngle,float32_is_unordered(1, FST1, FST0, &env->fp_status))
-FOP_COND_S(seq, !float32_is_unordered(1, FST1, FST0, &env->fp_status) && float32_eq(FST0, FST1, &env->fp_status))
-FOP_COND_S(ngl, float32_is_unordered(1, FST1, FST0, &env->fp_status) || float32_eq(FST0, FST1, &env->fp_status))
-FOP_COND_S(lt, !float32_is_unordered(1, FST1, FST0, &env->fp_status) && float32_lt(FST0, FST1, &env->fp_status))
-FOP_COND_S(nge, float32_is_unordered(1, FST1, FST0, &env->fp_status) || float32_lt(FST0, FST1, &env->fp_status))
-FOP_COND_S(le, !float32_is_unordered(1, FST1, FST0, &env->fp_status) && float32_le(FST0, FST1, &env->fp_status))
-FOP_COND_S(ngt, float32_is_unordered(1, FST1, FST0, &env->fp_status) || float32_le(FST0, FST1, &env->fp_status))
+FOP_COND_S(sf, (float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status), 0))
+FOP_COND_S(ngle,float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status))
+FOP_COND_S(seq, !float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) && float32_eq(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(ngl, float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) || float32_eq(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(lt, !float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) && float32_lt(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(nge, float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) || float32_lt(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(le, !float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) && float32_le(FST0, FST1, &env->fpu->fp_status))
+FOP_COND_S(ngt, float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) || float32_le(FST0, FST1, &env->fpu->fp_status))
#define FOP_COND_PS(op, condl, condh) \
void do_cmp_ps_ ## op (long cc) \
int ch = condh; \
update_fcr31(); \
if (cl) \
- SET_FP_COND(cc, env); \
+ SET_FP_COND(cc, env->fpu); \
else \
- CLEAR_FP_COND(cc, env); \
+ CLEAR_FP_COND(cc, env->fpu); \
if (ch) \
- SET_FP_COND(cc + 1, env); \
+ SET_FP_COND(cc + 1, env->fpu); \
else \
- CLEAR_FP_COND(cc + 1, env); \
+ CLEAR_FP_COND(cc + 1, env->fpu); \
} \
void do_cmpabs_ps_ ## op (long cc) \
{ \
ch = condh; \
update_fcr31(); \
if (cl) \
- SET_FP_COND(cc, env); \
+ SET_FP_COND(cc, env->fpu); \
else \
- CLEAR_FP_COND(cc, env); \
+ CLEAR_FP_COND(cc, env->fpu); \
if (ch) \
- SET_FP_COND(cc + 1, env); \
+ SET_FP_COND(cc + 1, env->fpu); \
else \
- CLEAR_FP_COND(cc + 1, env); \
+ CLEAR_FP_COND(cc + 1, env->fpu); \
}
/* NOTE: the comma operator will make "cond" to eval to false,
* but float*_is_unordered() is still called. */
-FOP_COND_PS(f, (float32_is_unordered(0, FST1, FST0, &env->fp_status), 0),
- (float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status), 0))
-FOP_COND_PS(un, float32_is_unordered(0, FST1, FST0, &env->fp_status),
- float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status))
-FOP_COND_PS(eq, !float32_is_unordered(0, FST1, FST0, &env->fp_status) && float32_eq(FST0, FST1, &env->fp_status),
- !float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status) && float32_eq(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(ueq, float32_is_unordered(0, FST1, FST0, &env->fp_status) || float32_eq(FST0, FST1, &env->fp_status),
- float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status) || float32_eq(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(olt, !float32_is_unordered(0, FST1, FST0, &env->fp_status) && float32_lt(FST0, FST1, &env->fp_status),
- !float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status) && float32_lt(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(ult, float32_is_unordered(0, FST1, FST0, &env->fp_status) || float32_lt(FST0, FST1, &env->fp_status),
- float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status) || float32_lt(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(ole, !float32_is_unordered(0, FST1, FST0, &env->fp_status) && float32_le(FST0, FST1, &env->fp_status),
- !float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status) && float32_le(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(ule, float32_is_unordered(0, FST1, FST0, &env->fp_status) || float32_le(FST0, FST1, &env->fp_status),
- float32_is_unordered(0, FSTH1, FSTH0, &env->fp_status) || float32_le(FSTH0, FSTH1, &env->fp_status))
+FOP_COND_PS(f, (float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status), 0),
+ (float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status), 0))
+FOP_COND_PS(un, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status),
+ float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status))
+FOP_COND_PS(eq, !float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) && float32_eq(FST0, FST1, &env->fpu->fp_status),
+ !float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status) && float32_eq(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(ueq, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) || float32_eq(FST0, FST1, &env->fpu->fp_status),
+ float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status) || float32_eq(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(olt, !float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) && float32_lt(FST0, FST1, &env->fpu->fp_status),
+ !float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status) && float32_lt(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(ult, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) || float32_lt(FST0, FST1, &env->fpu->fp_status),
+ float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status) || float32_lt(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(ole, !float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) && float32_le(FST0, FST1, &env->fpu->fp_status),
+ !float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status) && float32_le(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(ule, float32_is_unordered(0, FST1, FST0, &env->fpu->fp_status) || float32_le(FST0, FST1, &env->fpu->fp_status),
+ float32_is_unordered(0, FSTH1, FSTH0, &env->fpu->fp_status) || float32_le(FSTH0, FSTH1, &env->fpu->fp_status))
/* NOTE: the comma operator will make "cond" to eval to false,
* but float*_is_unordered() is still called. */
-FOP_COND_PS(sf, (float32_is_unordered(1, FST1, FST0, &env->fp_status), 0),
- (float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status), 0))
-FOP_COND_PS(ngle,float32_is_unordered(1, FST1, FST0, &env->fp_status),
- float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status))
-FOP_COND_PS(seq, !float32_is_unordered(1, FST1, FST0, &env->fp_status) && float32_eq(FST0, FST1, &env->fp_status),
- !float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status) && float32_eq(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(ngl, float32_is_unordered(1, FST1, FST0, &env->fp_status) || float32_eq(FST0, FST1, &env->fp_status),
- float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status) || float32_eq(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(lt, !float32_is_unordered(1, FST1, FST0, &env->fp_status) && float32_lt(FST0, FST1, &env->fp_status),
- !float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status) && float32_lt(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(nge, float32_is_unordered(1, FST1, FST0, &env->fp_status) || float32_lt(FST0, FST1, &env->fp_status),
- float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status) || float32_lt(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(le, !float32_is_unordered(1, FST1, FST0, &env->fp_status) && float32_le(FST0, FST1, &env->fp_status),
- !float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status) && float32_le(FSTH0, FSTH1, &env->fp_status))
-FOP_COND_PS(ngt, float32_is_unordered(1, FST1, FST0, &env->fp_status) || float32_le(FST0, FST1, &env->fp_status),
- float32_is_unordered(1, FSTH1, FSTH0, &env->fp_status) || float32_le(FSTH0, FSTH1, &env->fp_status))
+FOP_COND_PS(sf, (float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status), 0),
+ (float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status), 0))
+FOP_COND_PS(ngle,float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status),
+ float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status))
+FOP_COND_PS(seq, !float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) && float32_eq(FST0, FST1, &env->fpu->fp_status),
+ !float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status) && float32_eq(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(ngl, float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) || float32_eq(FST0, FST1, &env->fpu->fp_status),
+ float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status) || float32_eq(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(lt, !float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) && float32_lt(FST0, FST1, &env->fpu->fp_status),
+ !float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status) && float32_lt(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(nge, float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) || float32_lt(FST0, FST1, &env->fpu->fp_status),
+ float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status) || float32_lt(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(le, !float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) && float32_le(FST0, FST1, &env->fpu->fp_status),
+ !float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status) && float32_le(FSTH0, FSTH1, &env->fpu->fp_status))
+FOP_COND_PS(ngt, float32_is_unordered(1, FST1, FST0, &env->fpu->fp_status) || float32_le(FST0, FST1, &env->fpu->fp_status),
+ float32_is_unordered(1, FSTH1, FSTH0, &env->fpu->fp_status) || float32_le(FSTH0, FSTH1, &env->fpu->fp_status))
projects / qemu / blobdiff