/*
* i386 micro operations
- *
+ *
* Copyright (c) 2003 Fabrice Bellard
*
* This library is free software; you can redistribute it and/or
#ifdef TARGET_X86_64
void OPPROTO op_bswapq_T0(void)
{
- T0 = bswap64(T0);
+ helper_bswapq_T0();
}
#endif
{
int64_t res;
res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
- EAX = res;
- EDX = res >> 32;
+ EAX = (uint32_t)(res);
+ EDX = (uint32_t)(res >> 32);
CC_DST = res;
CC_SRC = (res != (int32_t)res);
}
#endif
/* division, flags are undefined */
-/* XXX: add exceptions for overflow */
void OPPROTO op_divb_AL_T0(void)
{
if (den == 0) {
raise_exception(EXCP00_DIVZ);
}
- q = (num / den) & 0xff;
+ q = (num / den);
+ if (q > 0xff)
+ raise_exception(EXCP00_DIVZ);
+ q &= 0xff;
r = (num % den) & 0xff;
EAX = (EAX & ~0xffff) | (r << 8) | q;
}
if (den == 0) {
raise_exception(EXCP00_DIVZ);
}
- q = (num / den) & 0xff;
+ q = (num / den);
+ if (q != (int8_t)q)
+ raise_exception(EXCP00_DIVZ);
+ q &= 0xff;
r = (num % den) & 0xff;
EAX = (EAX & ~0xffff) | (r << 8) | q;
}
if (den == 0) {
raise_exception(EXCP00_DIVZ);
}
- q = (num / den) & 0xffff;
+ q = (num / den);
+ if (q > 0xffff)
+ raise_exception(EXCP00_DIVZ);
+ q &= 0xffff;
r = (num % den) & 0xffff;
EAX = (EAX & ~0xffff) | q;
EDX = (EDX & ~0xffff) | r;
if (den == 0) {
raise_exception(EXCP00_DIVZ);
}
- q = (num / den) & 0xffff;
+ q = (num / den);
+ if (q != (int16_t)q)
+ raise_exception(EXCP00_DIVZ);
+ q &= 0xffff;
r = (num % den) & 0xffff;
EAX = (EAX & ~0xffff) | q;
EDX = (EDX & ~0xffff) | r;
} UREG64;
#endif
-#ifdef TARGET_X86_64
-
#define PARAMQ1 \
({\
UREG64 __p;\
__p.l.v1 = PARAM1;\
__p.l.v0 = PARAM2;\
__p.q;\
-})
+})
+
+#ifdef TARGET_X86_64
void OPPROTO op_movq_T0_im64(void)
{
T0 = PARAMQ1;
}
+void OPPROTO op_movq_T1_im64(void)
+{
+ T1 = PARAMQ1;
+}
+
void OPPROTO op_movq_A0_im(void)
{
A0 = (int32_t)PARAM1;
void OPPROTO op_hlt(void)
{
- env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
- env->exception_index = EXCP_HLT;
- cpu_loop_exit();
+ helper_hlt();
+}
+
+void OPPROTO op_monitor(void)
+{
+ helper_monitor();
+}
+
+void OPPROTO op_mwait(void)
+{
+ helper_mwait();
}
void OPPROTO op_debug(void)
env->hflags &= ~HF_INHIBIT_IRQ_MASK;
}
+void OPPROTO op_rsm(void)
+{
+ helper_rsm();
+}
+
#if 0
/* vm86plus instructions */
void OPPROTO op_cli_vm(void)
helper_cmpxchg8b();
}
+void OPPROTO op_single_step(void)
+{
+ helper_single_step();
+}
+
void OPPROTO op_movl_T0_0(void)
{
T0 = 0;
void OPPROTO op_movswl_EAX_AX(void)
{
- EAX = (int16_t)EAX;
+ EAX = (uint32_t)((int16_t)EAX);
}
#ifdef TARGET_X86_64
void OPPROTO op_movslq_EDX_EAX(void)
{
- EDX = (int32_t)EAX >> 31;
+ EDX = (uint32_t)((int32_t)EAX >> 31);
}
void OPPROTO op_movswl_DX_AX(void)
void op_addl_A0_SS(void)
{
- A0 += (long)env->segs[R_SS].base;
+ A0 = (uint32_t)(A0 + env->segs[R_SS].base);
}
void op_subl_A0_2(void)
}
#ifdef TARGET_X86_64
+void op_subq_A0_2(void)
+{
+ A0 -= 2;
+}
+
void op_subq_A0_8(void)
{
A0 -= 8;
helper_enter_level(PARAM1, PARAM2);
}
+#ifdef TARGET_X86_64
+void OPPROTO op_enter64_level(void)
+{
+ helper_enter64_level(PARAM1, PARAM2);
+}
+#endif
+
void OPPROTO op_sysenter(void)
{
helper_sysenter();
}
EAX = (EAX & ~0xffff) | al | (ah << 8);
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_aas(void)
}
EAX = (EAX & ~0xffff) | al | (ah << 8);
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_daa(void)
eflags |= parity_table[al]; /* pf */
eflags |= (al & 0x80); /* sf */
CC_SRC = eflags;
+ FORCE_RET();
}
void OPPROTO op_das(void)
eflags |= parity_table[al]; /* pf */
eflags |= (al & 0x80); /* sf */
CC_SRC = eflags;
+ FORCE_RET();
}
/* segment handling */
{
int selector;
SegmentCache *sc;
-
+
selector = T0 & 0xffff;
/* env->segs[] access */
sc = (SegmentCache *)((char *)env + PARAM1);
}
FORCE_RET();
}
-
+
void OPPROTO op_arpl_update(void)
{
int eflags;
eflags = cc_table[CC_OP].compute_all();
CC_SRC = (eflags & ~CC_Z) | T1;
}
-
+
/* T0: segment, T1:eip */
void OPPROTO op_ljmp_protected_T0_T1(void)
{
helper_ltr_T0();
}
-/* CR registers access */
+/* CR registers access. */
void OPPROTO op_movl_crN_T0(void)
{
helper_movl_crN_T0(PARAM1);
}
+/* These pseudo-opcodes check for SVM intercepts. */
+void OPPROTO op_svm_check_intercept(void)
+{
+ A0 = PARAM1 & PARAM2;
+ svm_check_intercept(PARAMQ1);
+}
+
+void OPPROTO op_svm_check_intercept_param(void)
+{
+ A0 = PARAM1 & PARAM2;
+ svm_check_intercept_param(PARAMQ1, T1);
+}
+
+void OPPROTO op_svm_vmexit(void)
+{
+ A0 = PARAM1 & PARAM2;
+ vmexit(PARAMQ1, T1);
+}
+
+void OPPROTO op_geneflags(void)
+{
+ CC_SRC = cc_table[CC_OP].compute_all();
+}
+
+/* This pseudo-opcode checks for IO intercepts. */
+#if !defined(CONFIG_USER_ONLY)
+void OPPROTO op_svm_check_intercept_io(void)
+{
+ A0 = PARAM1 & PARAM2;
+ /* PARAMQ1 = TYPE (0 = OUT, 1 = IN; 4 = STRING; 8 = REP)
+ T0 = PORT
+ T1 = next eip */
+ stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), T1);
+ /* ASIZE does not appear on real hw */
+ svm_check_intercept_param(SVM_EXIT_IOIO,
+ (PARAMQ1 & ~SVM_IOIO_ASIZE_MASK) |
+ ((T0 & 0xffff) << 16));
+}
+#endif
+
+#if !defined(CONFIG_USER_ONLY)
+void OPPROTO op_movtl_T0_cr8(void)
+{
+ T0 = cpu_get_apic_tpr(env);
+}
+#endif
+
/* DR registers access */
void OPPROTO op_movl_drN_T0(void)
{
void OPPROTO op_goto_tb0(void)
{
- GOTO_TB(op_goto_tb0, 0);
+ GOTO_TB(op_goto_tb0, PARAM1, 0);
}
void OPPROTO op_goto_tb1(void)
{
- GOTO_TB(op_goto_tb1, 1);
+ GOTO_TB(op_goto_tb1, PARAM1, 1);
}
void OPPROTO op_jmp_label(void)
{
if (T0)
GOTO_LABEL_PARAM(1);
+ FORCE_RET();
}
void OPPROTO op_jz_T0_label(void)
{
if (!T0)
GOTO_LABEL_PARAM(1);
+ FORCE_RET();
}
/* slow set cases (compute x86 flags) */
CC_OP = PARAM1;
}
+void OPPROTO op_mov_T0_cc(void)
+{
+ T0 = cc_table[CC_OP].compute_all();
+}
+
/* XXX: clear VIF/VIP in all ops ? */
void OPPROTO op_movl_eflags_T0(void)
[CC_OP_SUBB] = { compute_all_subb, compute_c_subb },
[CC_OP_SUBW] = { compute_all_subw, compute_c_subw },
[CC_OP_SUBL] = { compute_all_subl, compute_c_subl },
-
+
[CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb },
[CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw },
[CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl },
-
+
[CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
[CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
[CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
-
+
[CC_OP_INCB] = { compute_all_incb, compute_c_incl },
[CC_OP_INCW] = { compute_all_incw, compute_c_incl },
[CC_OP_INCL] = { compute_all_incl, compute_c_incl },
-
+
[CC_OP_DECB] = { compute_all_decb, compute_c_incl },
[CC_OP_DECW] = { compute_all_decw, compute_c_incl },
[CC_OP_DECL] = { compute_all_decl, compute_c_incl },
-
+
[CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
[CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
[CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
[CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq },
[CC_OP_SUBQ] = { compute_all_subq, compute_c_subq },
-
+
[CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq },
-
+
[CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
-
+
[CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
[CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
functions comes from the LGPL'ed x86 emulator found in the Willows
TWIN windows emulator. */
-#if defined(__powerpc__)
-extern CPU86_LDouble copysign(CPU86_LDouble, CPU86_LDouble);
-
-/* correct (but slow) PowerPC rint() (glibc version is incorrect) */
-double qemu_rint(double x)
-{
- double y = 4503599627370496.0;
- if (fabs(x) >= y)
- return x;
- if (x < 0)
- y = -y;
- y = (x + y) - y;
- if (y == 0.0)
- y = copysign(y, x);
- return y;
-}
-
-#define rint qemu_rint
-#endif
-
/* fp load FT0 */
void OPPROTO op_flds_FT0_A0(void)
#else
stfl(A0, (float)ST0);
#endif
+ FORCE_RET();
}
void OPPROTO op_fstl_ST0_A0(void)
{
stfq(A0, (double)ST0);
+ FORCE_RET();
}
void OPPROTO op_fstt_ST0_A0(void)
int val;
d = ST0;
- val = lrint(d);
+ val = floatx_to_int32(d, &env->fp_status);
if (val != (int16_t)val)
val = -32768;
stw(A0, val);
+ FORCE_RET();
}
void OPPROTO op_fistl_ST0_A0(void)
int val;
d = ST0;
- val = lrint(d);
+ val = floatx_to_int32(d, &env->fp_status);
stl(A0, val);
+ FORCE_RET();
}
void OPPROTO op_fistll_ST0_A0(void)
int64_t val;
d = ST0;
- val = llrint(d);
+ val = floatx_to_int64(d, &env->fp_status);
stq(A0, val);
+ FORCE_RET();
+}
+
+void OPPROTO op_fistt_ST0_A0(void)
+{
+#if defined(__sparc__) && !defined(__sparc_v9__)
+ register CPU86_LDouble d asm("o0");
+#else
+ CPU86_LDouble d;
+#endif
+ int val;
+
+ d = ST0;
+ val = floatx_to_int32_round_to_zero(d, &env->fp_status);
+ if (val != (int16_t)val)
+ val = -32768;
+ stw(A0, val);
+ FORCE_RET();
+}
+
+void OPPROTO op_fisttl_ST0_A0(void)
+{
+#if defined(__sparc__) && !defined(__sparc_v9__)
+ register CPU86_LDouble d asm("o0");
+#else
+ CPU86_LDouble d;
+#endif
+ int val;
+
+ d = ST0;
+ val = floatx_to_int32_round_to_zero(d, &env->fp_status);
+ stl(A0, val);
+ FORCE_RET();
+}
+
+void OPPROTO op_fisttll_ST0_A0(void)
+{
+#if defined(__sparc__) && !defined(__sparc_v9__)
+ register CPU86_LDouble d asm("o0");
+#else
+ CPU86_LDouble d;
+#endif
+ int64_t val;
+
+ d = ST0;
+ val = floatx_to_int64_round_to_zero(d, &env->fp_status);
+ stq(A0, val);
+ FORCE_RET();
}
void OPPROTO op_fbld_ST0_A0(void)
/* FPU operations */
-/* XXX: handle nans */
+const int fcom_ccval[4] = {0x0100, 0x4000, 0x0000, 0x4500};
+
void OPPROTO op_fcom_ST0_FT0(void)
{
- env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
- if (ST0 < FT0)
- env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
- else if (ST0 == FT0)
- env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
+ int ret;
+
+ ret = floatx_compare(ST0, FT0, &env->fp_status);
+ env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
FORCE_RET();
}
-/* XXX: handle nans */
void OPPROTO op_fucom_ST0_FT0(void)
{
- env->fpus &= (~0x4500); /* (C3,C2,C0) <-- 000 */
- if (ST0 < FT0)
- env->fpus |= 0x100; /* (C3,C2,C0) <-- 001 */
- else if (ST0 == FT0)
- env->fpus |= 0x4000; /* (C3,C2,C0) <-- 100 */
+ int ret;
+
+ ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
+ env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
FORCE_RET();
}
-/* XXX: handle nans */
+const int fcomi_ccval[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
+
void OPPROTO op_fcomi_ST0_FT0(void)
{
int eflags;
+ int ret;
+
+ ret = floatx_compare(ST0, FT0, &env->fp_status);
eflags = cc_table[CC_OP].compute_all();
- eflags &= ~(CC_Z | CC_P | CC_C);
- if (ST0 < FT0)
- eflags |= CC_C;
- else if (ST0 == FT0)
- eflags |= CC_Z;
+ eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
FORCE_RET();
}
-/* XXX: handle nans */
void OPPROTO op_fucomi_ST0_FT0(void)
{
int eflags;
+ int ret;
+
+ ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
eflags = cc_table[CC_OP].compute_all();
- eflags &= ~(CC_Z | CC_P | CC_C);
- if (ST0 < FT0)
- eflags |= CC_C;
- else if (ST0 == FT0)
- eflags |= CC_Z;
+ eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
FORCE_RET();
}
/* misc FPU operations */
void OPPROTO op_fchs_ST0(void)
{
- ST0 = -ST0;
+ ST0 = floatx_chs(ST0);
}
void OPPROTO op_fabs_ST0(void)
{
- ST0 = fabs(ST0);
+ ST0 = floatx_abs(ST0);
}
void OPPROTO op_fxam_ST0(void)
int fpus;
fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
stw(A0, fpus);
+ FORCE_RET();
}
void OPPROTO op_fnstsw_EAX(void)
void OPPROTO op_fnstcw_A0(void)
{
stw(A0, env->fpuc);
+ FORCE_RET();
}
void OPPROTO op_fldcw_A0(void)
{
- int rnd_type;
env->fpuc = lduw(A0);
- /* set rounding mode */
- switch(env->fpuc & RC_MASK) {
- default:
- case RC_NEAR:
- rnd_type = FE_TONEAREST;
- break;
- case RC_DOWN:
- rnd_type = FE_DOWNWARD;
- break;
- case RC_UP:
- rnd_type = FE_UPWARD;
- break;
- case RC_CHOP:
- rnd_type = FE_TOWARDZERO;
- break;
- }
- fesetround(rnd_type);
+ update_fp_status();
}
void OPPROTO op_fclex(void)
#define SHIFT 1
#include "ops_sse.h"
+
+/* Secure Virtual Machine ops */
+
+void OPPROTO op_vmrun(void)
+{
+ helper_vmrun(EAX);
+}
+
+void OPPROTO op_vmmcall(void)
+{
+ helper_vmmcall();
+}
+
+void OPPROTO op_vmload(void)
+{
+ helper_vmload(EAX);
+}
+
+void OPPROTO op_vmsave(void)
+{
+ helper_vmsave(EAX);
+}
+
+void OPPROTO op_stgi(void)
+{
+ helper_stgi();
+}
+
+void OPPROTO op_clgi(void)
+{
+ helper_clgi();
+}
+
+void OPPROTO op_skinit(void)
+{
+ helper_skinit();
+}
+
+void OPPROTO op_invlpga(void)
+{
+ helper_invlpga();
+}
projects / qemu / blobdiff