Fix kernel loading

[qemu] / target-arm / op.c

diff --git a/target-arm/op.c b/target-arm/op.c
index f06b06b..e8a536c 100644 (file)
--- a/target-arm/op.c
+++ b/target-arm/op.c
@@ -1,6 +1,6 @@
 /*
  *  ARM micro operations
- * 
+ *
  *  Copyright (c) 2003 Fabrice Bellard
  *  Copyright (c) 2005 CodeSourcery, LLC
  *
@@ -667,7 +667,7 @@ void OPPROTO op_sarl_T1_T0_cc(void)
     if (shift >= 32) {
         env->CF = (T1 >> 31) & 1;
         T1 = (int32_t)T1 >> 31;
-    } else {
+    } else if (shift != 0) {
         env->CF = (T1 >> (shift - 1)) & 1;
         T1 = (int32_t)T1 >> shift;
     }
@@ -774,7 +774,7 @@ void OPPROTO op_addl_T0_T1_saturate(void)
   }
   else
     T0 = res;
-  
+
   FORCE_RET();
 }
 
@@ -786,13 +786,13 @@ void OPPROTO op_subl_T0_T1_saturate(void)
   if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) {
       env->QF = 1;
       if (T0 & SIGNBIT)
-          T0 = 0x8000000;
+          T0 = 0x80000000;
       else
           T0 = 0x7fffffff;
   }
   else
     T0 = res;
-  
+
   FORCE_RET();
 }
 
@@ -819,7 +819,7 @@ void OPPROTO op_shll_T0_im_thumb(void)
     int shift;
     shift = PARAM1;
     if (shift != 0) {
-       env->CF = (T1 >> (32 - shift)) & 1;
+       env->CF = (T0 >> (32 - shift)) & 1;
        T0 = T0 << shift;
     }
     env->NZF = T0;
@@ -832,7 +832,7 @@ void OPPROTO op_shrl_T0_im_thumb(void)
 
     shift = PARAM1;
     if (shift == 0) {
-       env->CF = ((uint32_t)shift) >> 31;
+       env->CF = ((uint32_t)T0) >> 31;
        T0 = 0;
     } else {
        env->CF = (T0 >> (shift - 1)) & 1;
@@ -1094,7 +1094,7 @@ void OPPROTO op_vfp_movl_T0_fpscr(void)
 
 void OPPROTO op_vfp_movl_T0_fpscr_flags(void)
 {
-    T0 = env->vfp.fpscr & (0xf << 28);
+    T0 = env->vfp.xregs[ARM_VFP_FPSCR] & (0xf << 28);
 }
 
 void OPPROTO op_vfp_movl_fpscr_T0(void)
@@ -1102,6 +1102,16 @@ void OPPROTO op_vfp_movl_fpscr_T0(void)
     do_vfp_set_fpscr();
 }
 
+void OPPROTO op_vfp_movl_T0_xreg(void)
+{
+    T0 = env->vfp.xregs[PARAM1];
+}
+
+void OPPROTO op_vfp_movl_xreg_T0(void)
+{
+    env->vfp.xregs[PARAM1] = T0;
+}
+
 /* Move between FT0s to T0  */
 void OPPROTO op_vfp_mrs(void)
 {
@@ -1117,7 +1127,7 @@ void OPPROTO op_vfp_msr(void)
 void OPPROTO op_vfp_mrrd(void)
 {
     CPU_DoubleU u;
-    
+
     u.d = FT0d;
     T0 = u.l.lower;
     T1 = u.l.upper;
@@ -1126,18 +1136,30 @@ void OPPROTO op_vfp_mrrd(void)
 void OPPROTO op_vfp_mdrr(void)
 {
     CPU_DoubleU u;
-    
+
     u.l.lower = T0;
     u.l.upper = T1;
     FT0d = u.d;
 }
 
-/* Copy the most significant bit to T0 to all bits of T1.  */
+/* Copy the most significant bit of T0 to all bits of T1.  */
 void OPPROTO op_signbit_T1_T0(void)
 {
     T1 = (int32_t)T0 >> 31;
 }
 
+void OPPROTO op_movl_cp_T0(void)
+{
+    helper_set_cp(env, PARAM1, T0);
+    FORCE_RET();
+}
+
+void OPPROTO op_movl_T0_cp(void)
+{
+    T0 = helper_get_cp(env, PARAM1);
+    FORCE_RET();
+}
+
 void OPPROTO op_movl_cp15_T0(void)
 {
     helper_set_cp15(env, PARAM1, T0);
@@ -1191,3 +1213,6 @@ void OPPROTO op_movl_T0_T2(void)
 {
     T0 = T2;
 }
+
+/* iwMMXt support */
+#include "op_iwmmxt.c"