/*
* ARM micro operations
- *
+ *
* Copyright (c) 2003 Fabrice Bellard
* Copyright (c) 2005 CodeSourcery, LLC
*
T0 = PARAM1;
}
+void OPPROTO op_movl_T0_T1(void)
+{
+ T0 = T1;
+}
+
void OPPROTO op_movl_T1_im(void)
{
T1 = PARAM1;
FORCE_RET();
}
-void OPPROTO op_jmp0(void)
+void OPPROTO op_goto_tb0(void)
{
- JUMP_TB(op_jmp0, PARAM1, 0, PARAM2);
+ GOTO_TB(op_goto_tb0, PARAM1, 0);
}
-void OPPROTO op_jmp1(void)
+void OPPROTO op_goto_tb1(void)
{
- JUMP_TB(op_jmp1, PARAM1, 1, PARAM2);
+ GOTO_TB(op_goto_tb1, PARAM1, 1);
}
void OPPROTO op_exit_tb(void)
EXIT_TB();
}
-void OPPROTO op_movl_T0_psr(void)
+void OPPROTO op_movl_T0_cpsr(void)
+{
+ T0 = cpsr_read(env);
+ FORCE_RET();
+}
+
+void OPPROTO op_movl_T0_spsr(void)
{
- T0 = compute_cpsr();
+ T0 = env->spsr;
}
-/* NOTE: N = 1 and Z = 1 cannot be stored currently */
-void OPPROTO op_movl_psr_T0(void)
+void OPPROTO op_movl_spsr_T0(void)
{
- unsigned int psr;
- psr = T0;
- env->CF = (psr >> 29) & 1;
- env->NZF = (psr & 0xc0000000) ^ 0x40000000;
- env->VF = (psr << 3) & 0x80000000;
- /* for user mode we do not update other state info */
+ uint32_t mask = PARAM1;
+ env->spsr = (env->spsr & ~mask) | (T0 & mask);
+}
+
+void OPPROTO op_movl_cpsr_T0(void)
+{
+ cpsr_write(env, T0, PARAM1);
+ FORCE_RET();
}
void OPPROTO op_mul_T0_T1(void)
/* memory access */
-void OPPROTO op_ldub_T0_T1(void)
-{
- T0 = ldub((void *)T1);
-}
+#define MEMSUFFIX _raw
+#include "op_mem.h"
-void OPPROTO op_ldsb_T0_T1(void)
-{
- T0 = ldsb((void *)T1);
-}
-
-void OPPROTO op_lduw_T0_T1(void)
-{
- T0 = lduw((void *)T1);
-}
-
-void OPPROTO op_ldsw_T0_T1(void)
-{
- T0 = ldsw((void *)T1);
-}
-
-void OPPROTO op_ldl_T0_T1(void)
-{
- T0 = ldl((void *)T1);
-}
-
-void OPPROTO op_stb_T0_T1(void)
-{
- stb((void *)T1, T0);
-}
-
-void OPPROTO op_stw_T0_T1(void)
-{
- stw((void *)T1, T0);
-}
-
-void OPPROTO op_stl_T0_T1(void)
-{
- stl((void *)T1, T0);
-}
-
-void OPPROTO op_swpb_T0_T1(void)
-{
- int tmp;
-
- cpu_lock();
- tmp = ldub((void *)T1);
- stb((void *)T1, T0);
- T0 = tmp;
- cpu_unlock();
-}
-
-void OPPROTO op_swpl_T0_T1(void)
-{
- int tmp;
-
- cpu_lock();
- tmp = ldl((void *)T1);
- stl((void *)T1, T0);
- T0 = tmp;
- cpu_unlock();
-}
+#if !defined(CONFIG_USER_ONLY)
+#define MEMSUFFIX _user
+#include "op_mem.h"
+#define MEMSUFFIX _kernel
+#include "op_mem.h"
+#endif
/* shifts */
if (shift >= 32) {
env->CF = (T1 >> 31) & 1;
T1 = (int32_t)T1 >> 31;
- } else {
+ } else if (shift != 0) {
env->CF = (T1 >> (shift - 1)) & 1;
T1 = (int32_t)T1 >> shift;
}
T0 = (int32_t)T0 >> PARAM1;
}
-/* 16->32 Sign extend */
-void OPPROTO op_sxl_T0(void)
+/* Sign/zero extend */
+void OPPROTO op_sxth_T0(void)
{
T0 = (int16_t)T0;
}
-void OPPROTO op_sxl_T1(void)
+void OPPROTO op_sxth_T1(void)
{
T1 = (int16_t)T1;
}
+void OPPROTO op_sxtb_T1(void)
+{
+ T1 = (int8_t)T1;
+}
+
+void OPPROTO op_uxtb_T1(void)
+{
+ T1 = (uint8_t)T1;
+}
+
+void OPPROTO op_uxth_T1(void)
+{
+ T1 = (uint16_t)T1;
+}
+
+void OPPROTO op_sxtb16_T1(void)
+{
+ uint32_t res;
+ res = (uint16_t)(int8_t)T1;
+ res |= (uint32_t)(int8_t)(T1 >> 16) << 16;
+ T1 = res;
+}
+
+void OPPROTO op_uxtb16_T1(void)
+{
+ uint32_t res;
+ res = (uint16_t)(uint8_t)T1;
+ res |= (uint32_t)(uint8_t)(T1 >> 16) << 16;
+ T1 = res;
+}
+
#define SIGNBIT (uint32_t)0x80000000
/* saturating arithmetic */
void OPPROTO op_addl_T0_T1_setq(void)
}
else
T0 = res;
-
+
FORCE_RET();
}
if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) {
env->QF = 1;
if (T0 & SIGNBIT)
- T0 = 0x8000000;
+ T0 = 0x80000000;
else
T0 = 0x7fffffff;
}
else
T0 = res;
-
+
FORCE_RET();
}
int shift;
shift = PARAM1;
if (shift != 0) {
- env->CF = (T1 >> (32 - shift)) & 1;
+ env->CF = (T0 >> (32 - shift)) & 1;
T0 = T0 << shift;
}
env->NZF = T0;
shift = PARAM1;
if (shift == 0) {
- env->CF = ((uint32_t)shift) >> 31;
+ env->CF = ((uint32_t)T0) >> 31;
T0 = 0;
} else {
env->CF = (T0 >> (shift - 1)) & 1;
cpu_loop_exit();
}
+void OPPROTO op_wfi(void)
+{
+ env->exception_index = EXCP_HLT;
+ env->halted = 1;
+ cpu_loop_exit();
+}
+
+void OPPROTO op_bkpt(void)
+{
+ env->exception_index = EXCP_BKPT;
+ cpu_loop_exit();
+}
+
/* VFP support. We follow the convention used for VFP instrunctions:
Single precition routines have a "s" suffix, double precision a
"d" suffix. */
void OPPROTO op_vfp_movl_T0_fpscr_flags(void)
{
- T0 = env->vfp.fpscr & (0xf << 28);
+ T0 = env->vfp.xregs[ARM_VFP_FPSCR] & (0xf << 28);
}
void OPPROTO op_vfp_movl_fpscr_T0(void)
do_vfp_set_fpscr();
}
+void OPPROTO op_vfp_movl_T0_xreg(void)
+{
+ T0 = env->vfp.xregs[PARAM1];
+}
+
+void OPPROTO op_vfp_movl_xreg_T0(void)
+{
+ env->vfp.xregs[PARAM1] = T0;
+}
+
/* Move between FT0s to T0 */
void OPPROTO op_vfp_mrs(void)
{
void OPPROTO op_vfp_mrrd(void)
{
CPU_DoubleU u;
-
+
u.d = FT0d;
T0 = u.l.lower;
T1 = u.l.upper;
void OPPROTO op_vfp_mdrr(void)
{
CPU_DoubleU u;
-
+
u.l.lower = T0;
u.l.upper = T1;
FT0d = u.d;
}
-/* Floating point load/store. Address is in T1 */
-void OPPROTO op_vfp_lds(void)
+/* Copy the most significant bit of T0 to all bits of T1. */
+void OPPROTO op_signbit_T1_T0(void)
+{
+ T1 = (int32_t)T0 >> 31;
+}
+
+void OPPROTO op_movl_cp_T0(void)
+{
+ helper_set_cp(env, PARAM1, T0);
+ FORCE_RET();
+}
+
+void OPPROTO op_movl_T0_cp(void)
+{
+ T0 = helper_get_cp(env, PARAM1);
+ FORCE_RET();
+}
+
+void OPPROTO op_movl_cp15_T0(void)
+{
+ helper_set_cp15(env, PARAM1, T0);
+ FORCE_RET();
+}
+
+void OPPROTO op_movl_T0_cp15(void)
{
- FT0s = ldfl((void *)T1);
+ T0 = helper_get_cp15(env, PARAM1);
+ FORCE_RET();
}
-void OPPROTO op_vfp_ldd(void)
+/* Access to user mode registers from privileged modes. */
+void OPPROTO op_movl_T0_user(void)
{
- FT0d = ldfq((void *)T1);
+ int regno = PARAM1;
+ if (regno == 13) {
+ T0 = env->banked_r13[0];
+ } else if (regno == 14) {
+ T0 = env->banked_r14[0];
+ } else if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
+ T0 = env->usr_regs[regno - 8];
+ } else {
+ T0 = env->regs[regno];
+ }
+ FORCE_RET();
}
-void OPPROTO op_vfp_sts(void)
+
+void OPPROTO op_movl_user_T0(void)
{
- stfl((void *)T1, FT0s);
+ int regno = PARAM1;
+ if (regno == 13) {
+ env->banked_r13[0] = T0;
+ } else if (regno == 14) {
+ env->banked_r14[0] = T0;
+ } else if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
+ env->usr_regs[regno - 8] = T0;
+ } else {
+ env->regs[regno] = T0;
+ }
+ FORCE_RET();
+}
+
+void OPPROTO op_movl_T2_T0(void)
+{
+ T2 = T0;
}
-void OPPROTO op_vfp_std(void)
+void OPPROTO op_movl_T0_T2(void)
{
- stfq((void *)T1, FT0d);
+ T0 = T2;
}
+
+/* iwMMXt support */
+#include "op_iwmmxt.c"
projects / qemu / blobdiff