{
#ifdef TARGET_I386
cpu_dump_state(cpu_single_env, NULL, monitor_fprintf,
- X86_DUMP_FPU | X86_DUMP_CCOP);
+ X86_DUMP_FPU);
#else
cpu_dump_state(cpu_single_env, NULL, monitor_fprintf,
0);
static void do_quit(void)
{
+#ifdef USE_KQEMU
+ kqemu_record_dump();
+#endif
exit(0);
}
qemu_system_reset_request();
}
+static void do_system_powerdown(void)
+{
+ qemu_system_powerdown_request();
+}
+
#if defined(TARGET_I386)
static void print_pte(uint32_t addr, uint32_t pte, uint32_t mask)
{
}
#endif
+static void do_info_kqemu(void)
+{
+#ifdef USE_KQEMU
+ int val;
+ val = 0;
+ if (cpu_single_env)
+ val = cpu_single_env->kqemu_enabled;
+ term_printf("kqemu is %s\n", val ? "enabled" : "disabled");
+#else
+ term_printf("kqemu support is not compiled\n");
+#endif
+}
+
+
static term_cmd_t term_cmds[] = {
{ "help|?", "s?", do_help,
"[cmd]", "show the help" },
"keys", "send keys to the VM (e.g. 'sendkey ctrl-alt-f1')" },
{ "system_reset", "", do_system_reset,
"", "reset the system" },
+ { "system_powerdown", "", do_system_powerdown,
+ "", "send system power down event" },
{ "sum", "ii", do_sum,
"addr size", "compute the checksum of a memory region" },
{ NULL, NULL, },
#endif
{ "jit", "", do_info_jit,
"", "show dynamic compiler info", },
+ { "kqemu", "", do_info_kqemu,
+ "", "show kqemu information", },
{ NULL, NULL, },
};
#endif
#if defined(TARGET_SPARC)
+#ifndef TARGET_SPARC64
static target_long monitor_get_psr (struct MonitorDef *md, int val)
{
return GET_PSR(cpu_single_env);
}
+#endif
static target_long monitor_get_reg(struct MonitorDef *md, int val)
{
{ "pc", offsetof(CPUState, pc) },
{ "npc", offsetof(CPUState, npc) },
{ "y", offsetof(CPUState, y) },
+#ifndef TARGET_SPARC64
{ "psr", 0, &monitor_get_psr, },
{ "wim", offsetof(CPUState, wim) },
+#endif
{ "tbr", offsetof(CPUState, tbr) },
{ "fsr", offsetof(CPUState, fsr) },
{ "f0", offsetof(CPUState, fpr[0]) },
{ "f29", offsetof(CPUState, fpr[29]) },
{ "f30", offsetof(CPUState, fpr[30]) },
{ "f31", offsetof(CPUState, fpr[31]) },
+#ifdef TARGET_SPARC64
+ { "f32", offsetof(CPUState, fpr[32]) },
+ { "f34", offsetof(CPUState, fpr[34]) },
+ { "f36", offsetof(CPUState, fpr[36]) },
+ { "f38", offsetof(CPUState, fpr[38]) },
+ { "f40", offsetof(CPUState, fpr[40]) },
+ { "f42", offsetof(CPUState, fpr[42]) },
+ { "f44", offsetof(CPUState, fpr[44]) },
+ { "f46", offsetof(CPUState, fpr[46]) },
+ { "f48", offsetof(CPUState, fpr[48]) },
+ { "f50", offsetof(CPUState, fpr[50]) },
+ { "f52", offsetof(CPUState, fpr[52]) },
+ { "f54", offsetof(CPUState, fpr[54]) },
+ { "f56", offsetof(CPUState, fpr[56]) },
+ { "f58", offsetof(CPUState, fpr[58]) },
+ { "f60", offsetof(CPUState, fpr[60]) },
+ { "f62", offsetof(CPUState, fpr[62]) },
+ { "asi", offsetof(CPUState, asi) },
+ { "pstate", offsetof(CPUState, pstate) },
+ { "cansave", offsetof(CPUState, cansave) },
+ { "canrestore", offsetof(CPUState, canrestore) },
+ { "otherwin", offsetof(CPUState, otherwin) },
+ { "wstate", offsetof(CPUState, wstate) },
+ { "cleanwin", offsetof(CPUState, cleanwin) },
+ { "fprs", offsetof(CPUState, fprs) },
+#endif
#endif
{ NULL },
};