return 0;
}
+static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
+{
+ struct sl_nand_s *s = (struct sl_nand_s *) opaque;
+ addr -= s->target_base;
+
+ if (addr == FLASH_FLASHIO)
+ return ecc_digest(&s->ecc, nand_getio(s->nand)) |
+ (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
+
+ return sl_readb(opaque, addr);
+}
+
static void sl_writeb(void *opaque, target_phys_addr_t addr,
uint32_t value)
{
CPUReadMemoryFunc *sl_readfn[] = {
sl_readb,
sl_readb,
- sl_readb,
+ sl_readl,
};
CPUWriteMemoryFunc *sl_writefn[] = {
sl_writeb,
iomemtype = cpu_register_io_memory(0, scoop_readfn,
scoop_writefn, &s[0]);
- cpu_register_physical_memory(s[0].target_base, 0xfff, iomemtype);
+ cpu_register_physical_memory(s[0].target_base, 0x1000, iomemtype);
register_savevm("scoop", 0, 0, scoop_save, scoop_load, &s[0]);
if (count < 2)
iomemtype = cpu_register_io_memory(0, scoop_readfn,
scoop_writefn, &s[1]);
- cpu_register_physical_memory(s[1].target_base, 0xfff, iomemtype);
+ cpu_register_physical_memory(s[1].target_base, 0x1000, iomemtype);
register_savevm("scoop", 1, 0, scoop_save, scoop_load, &s[1]);
return s;
if (bs && bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
md = dscm1xxxx_init(bs);
- pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
+ pxa2xx_pcmcia_attach(cpu->pcmcia[1], md);
}
}
/* Wm8750 and Max7310 on I2C */
#define AKITA_MAX_ADDR 0x18
-#define SPITZ_WM_ADDRL 0x1a
-#define SPITZ_WM_ADDRH 0x1b
+#define SPITZ_WM_ADDRL 0x1b
+#define SPITZ_WM_ADDRH 0x1a
#define SPITZ_GPIO_WM 5
spitz_akita_i2c_setup(cpu);
if (model == terrier)
- /* A 6.0 GB microdrive is permanently sitting in CF slot 0. */
+ /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
spitz_microdrive_attach(cpu);
else if (model != akita)
- /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
+ /* A 4.0 GB microdrive is permanently sitting in CF slot 1. */
spitz_microdrive_attach(cpu);
/* Setup initial (reset) machine state */