const char *initrd_filename,
int is_heathrow)
{
+ CPUState *env;
char buf[1024];
SetIRQFunc *set_irq;
void *pic;
linux_boot = (kernel_filename != NULL);
+ /* init CPUs */
+ env = cpu_init();
+ register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
+
+ /* Register CPU as a 74x/75x */
+ /* XXX: CPU model (or PVR) should be provided on command line */
+ // ppc_find_by_name("750gx", &def); // Linux boot OK
+ // ppc_find_by_name("750fx", &def); // Linux boot OK
+ /* Linux does not boot on 750cxe (and probably other 750cx based)
+ * because it assumes it has 8 IBAT & DBAT pairs as it only have 4.
+ */
+ // ppc_find_by_name("750cxe", &def);
+ // ppc_find_by_name("750p", &def);
+ // ppc_find_by_name("740p", &def);
+ ppc_find_by_name("750", &def);
+ // ppc_find_by_name("740", &def);
+ // ppc_find_by_name("G3", &def);
+ // ppc_find_by_name("604r", &def);
+ // ppc_find_by_name("604e", &def);
+ // ppc_find_by_name("604", &def);
+ if (def == NULL) {
+ cpu_abort(env, "Unable to find PowerPC CPU definition\n");
+ }
+ cpu_ppc_register(env, def);
+
+ /* Set time-base frequency to 100 Mhz */
+ cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
+
+ env->osi_call = vga_osi_call;
+
/* allocate RAM */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
initrd_base = 0;
initrd_size = 0;
}
- /* Register CPU as a 74x/75x */
- /* XXX: CPU model (or PVR) should be provided on command line */
- // ppc_find_by_name("750gx", &def); // Linux boot OK
- // ppc_find_by_name("750fx", &def); // Linux boot OK
- /* Linux does not boot on 750cxe (and probably other 750cx based)
- * because it assumes it has 8 IBAT & DBAT pairs as it only have 4.
- */
- // ppc_find_by_name("750cxe", &def);
- // ppc_find_by_name("750p", &def);
- // ppc_find_by_name("740p", &def);
- ppc_find_by_name("750", &def);
- // ppc_find_by_name("740", &def);
- // ppc_find_by_name("G3", &def);
- // ppc_find_by_name("604r", &def);
- // ppc_find_by_name("604e", &def);
- // ppc_find_by_name("604", &def);
- if (def == NULL) {
- cpu_abort(cpu_single_env, "Unable to find PowerPC CPU definition\n");
- }
- cpu_ppc_register(cpu_single_env, def);
-
- /* Set time-base frequency to 100 Mhz */
- cpu_ppc_tb_init(cpu_single_env, 100UL * 1000UL * 1000UL);
-
- cpu_single_env->osi_call = vga_osi_call;
if (is_heathrow) {
isa_mem_base = 0x80000000;
isa_pic = pic_init(pic_irq_request, NULL);
/* XXX: use Mac Serial port */
- serial_init(0x3f8, 4, serial_hds[0]);
+ serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
for(i = 0; i < nb_nics; i++) {
- pci_ne2000_init(pci_bus, &nd_table[i]);
+ if (!nd_table[i].model)
+ nd_table[i].model = "ne2k_pci";
+ pci_nic_init(pci_bus, &nd_table[i]);
}
pci_cmd646_ide_init(pci_bus, &bs_table[0], 0);
macio_init(pci_bus, 0x0017);
- nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
+ nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
arch_name = "HEATHROW";
} else {
vga_initialize(pci_bus, ds, phys_ram_base + ram_size,
ram_size, vga_ram_size,
vga_bios_offset, vga_bios_size);
- pic = openpic_init(NULL, &openpic_mem_index, 1);
+ pic = openpic_init(NULL, &openpic_mem_index, 1, &env);
set_irq = openpic_set_irq;
pci_set_pic(pci_bus, set_irq, pic);
isa_pic = pic_init(pic_irq_request, NULL);
/* XXX: use Mac Serial port */
- serial_init(0x3f8, 4, serial_hds[0]);
+ serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
for(i = 0; i < nb_nics; i++) {
pci_ne2000_init(pci_bus, &nd_table[i]);
macio_init(pci_bus, 0x0022);
- nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE);
+ nvram = m48t59_init(8, 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
arch_name = "MAC99";
}