8250: Customized base baudrate

[qemu] / hw / pl181.c

diff --git a/hw/pl181.c b/hw/pl181.c
index a905cbb..75c3143 100644 (file)
--- a/hw/pl181.c
+++ b/hw/pl181.c
@@ -7,7 +7,8 @@
  * This code is licenced under the GPL.
  */
 
-#include "vl.h"
+#include "hw.h"
+#include "primecell.h"
 #include "sd.h"
 
 //#define DEBUG_PL181 1
@@ -333,7 +334,7 @@ static uint32_t pl181_read(void *opaque, target_phys_addr_t offset)
             return value;
         }
     default:
-        cpu_abort (cpu_single_env, "pl181_read: Bad offset %x\n", offset);
+        cpu_abort (cpu_single_env, "pl181_read: Bad offset %x\n", (int)offset);
         return 0;
     }
 }
@@ -405,7 +406,7 @@ static void pl181_write(void *opaque, target_phys_addr_t offset,
         }
         break;
     default:
-        cpu_abort (cpu_single_env, "pl181_write: Bad offset %x\n", offset);
+        cpu_abort (cpu_single_env, "pl181_write: Bad offset %x\n", (int)offset);
     }
     pl181_update(s);
 }
@@ -457,7 +458,7 @@ void pl181_init(uint32_t base, BlockDriverState *bd,
                                        pl181_writefn, s);
     cpu_register_physical_memory(base, 0x00001000, iomemtype);
     s->base = base;
-    s->card = sd_init(bd);
+    s->card = sd_init(bd, 0);
     s->irq[0] = irq0;
     s->irq[1] = irq1;
     qemu_register_reset(pl181_reset, s);