-/*
+/*
* Arm PrimeCell PL181 MultiMedia Card Interface
*
* Copyright (c) 2007 CodeSourcery.
* This code is licenced under the GPL.
*/
-#include "vl.h"
+#include "hw.h"
+#include "primecell.h"
#include "sd.h"
//#define DEBUG_PL181 1
s->response[2] = RWORD(8);
s->response[3] = RWORD(12) & ~1;
}
- DPRINTF("Response recieved\n");
+ DPRINTF("Response received\n");
s->status |= PL181_STATUS_CMDRESPEND;
#undef RWORD
} else {
s->status |= PL181_STATUS_CMDTIMEOUT;
}
-/* Transfer data between teh card and the FIFO. This is complicated by
+/* Transfer data between the card and the FIFO. This is complicated by
the FIFO holding 32-bit words and the card taking data in single byte
chunks. FIFO bytes are transferred in little-endian order. */
-
+
static void pl181_fifo_run(pl181_state *s)
{
uint32_t bits;
return value;
}
default:
- cpu_abort (cpu_single_env, "pl181_read: Bad offset %x\n", offset);
+ cpu_abort (cpu_single_env, "pl181_read: Bad offset %x\n", (int)offset);
return 0;
}
}
}
break;
default:
- cpu_abort (cpu_single_env, "pl181_write: Bad offset %x\n", offset);
+ cpu_abort (cpu_single_env, "pl181_write: Bad offset %x\n", (int)offset);
}
pl181_update(s);
}
pl181_writefn, s);
cpu_register_physical_memory(base, 0x00001000, iomemtype);
s->base = base;
- s->card = sd_init(bd);
+ s->card = sd_init(bd, 0);
s->irq[0] = irq0;
s->irq[1] = irq1;
qemu_register_reset(pl181_reset, s);