* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
-#include <stdlib.h>
-#include <stdio.h>
-#include <stdarg.h>
-#include <string.h>
-#include <getopt.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <sys/mman.h>
-#include <fcntl.h>
-#include <signal.h>
-#include <time.h>
-#include <sys/time.h>
-#include <malloc.h>
-#include <termios.h>
-#include <sys/poll.h>
-#include <errno.h>
-#include <sys/wait.h>
-#include <netinet/in.h>
-
-#include "cpu.h"
#include "vl.h"
/* debug PIC */
//#define DEBUG_PIC
+//#define DEBUG_IRQ_LATENCY
+
typedef struct PicState {
uint8_t last_irr; /* edge detection */
uint8_t irr; /* interrupt request register */
/* raise irq to CPU if necessary. must be called every time the active
irq may change */
-void pic_update_irq(void)
+static void pic_update_irq(void)
{
int irq2, irq;
#ifdef DEBUG_IRQ_LATENCY
int64_t irq_time[16];
-int64_t cpu_get_ticks(void);
#endif
#if defined(DEBUG_PIC)
int irq_level[16];
return intno;
}
-void pic_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
+static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
- PicState *s;
+ PicState *s = opaque;
int priority, cmd, irq;
#ifdef DEBUG_PIC
printf("pic_write: addr=0x%02x val=0x%02x\n", addr, val);
#endif
- s = &pics[addr >> 7];
addr &= 1;
if (addr == 0) {
if (val & 0x10) {
return ret;
}
-uint32_t pic_ioport_read(CPUState *env, uint32_t addr1)
+static uint32_t pic_ioport_read(void *opaque, uint32_t addr1)
{
- PicState *s;
+ PicState *s = opaque;
unsigned int addr;
int ret;
addr = addr1;
- s = &pics[addr >> 7];
addr &= 1;
if (s->poll) {
ret = pic_poll_read(s, addr1);
return ret;
}
+static void pic_save(QEMUFile *f, void *opaque)
+{
+ PicState *s = opaque;
+
+ qemu_put_8s(f, &s->last_irr);
+ qemu_put_8s(f, &s->irr);
+ qemu_put_8s(f, &s->imr);
+ qemu_put_8s(f, &s->isr);
+ qemu_put_8s(f, &s->priority_add);
+ qemu_put_8s(f, &s->irq_base);
+ qemu_put_8s(f, &s->read_reg_select);
+ qemu_put_8s(f, &s->poll);
+ qemu_put_8s(f, &s->special_mask);
+ qemu_put_8s(f, &s->init_state);
+ qemu_put_8s(f, &s->auto_eoi);
+ qemu_put_8s(f, &s->rotate_on_auto_eoi);
+ qemu_put_8s(f, &s->special_fully_nested_mode);
+ qemu_put_8s(f, &s->init4);
+}
+
+static int pic_load(QEMUFile *f, void *opaque, int version_id)
+{
+ PicState *s = opaque;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ qemu_get_8s(f, &s->last_irr);
+ qemu_get_8s(f, &s->irr);
+ qemu_get_8s(f, &s->imr);
+ qemu_get_8s(f, &s->isr);
+ qemu_get_8s(f, &s->priority_add);
+ qemu_get_8s(f, &s->irq_base);
+ qemu_get_8s(f, &s->read_reg_select);
+ qemu_get_8s(f, &s->poll);
+ qemu_get_8s(f, &s->special_mask);
+ qemu_get_8s(f, &s->init_state);
+ qemu_get_8s(f, &s->auto_eoi);
+ qemu_get_8s(f, &s->rotate_on_auto_eoi);
+ qemu_get_8s(f, &s->special_fully_nested_mode);
+ qemu_get_8s(f, &s->init4);
+ return 0;
+}
+
+/* XXX: add generic master/slave system */
+static void pic_init1(int io_addr, PicState *s)
+{
+ register_ioport_write(io_addr, 2, 1, pic_ioport_write, s);
+ register_ioport_read(io_addr, 2, 1, pic_ioport_read, s);
+
+ register_savevm("i8259", io_addr, 1, pic_save, pic_load, s);
+}
+
void pic_init(void)
{
-#if defined (TARGET_I386) || defined (TARGET_PPC)
- register_ioport_write(0x20, 2, pic_ioport_write, 1);
- register_ioport_read(0x20, 2, pic_ioport_read, 1);
- register_ioport_write(0xa0, 2, pic_ioport_write, 1);
- register_ioport_read(0xa0, 2, pic_ioport_read, 1);
-#endif
+ pic_init1(0x20, &pics[0]);
+ pic_init1(0xa0, &pics[1]);
}