return 0;
}
-PITState *pit_init(int base, int irq)
+static void pit_reset(void *opaque)
{
- PITState *pit = &pit_state;
+ PITState *pit = opaque;
PITChannelState *s;
int i;
for(i = 0;i < 3; i++) {
s = &pit->channels[i];
- if (i == 0) {
- /* the timer 0 is connected to an IRQ */
- s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s);
- s->irq = irq;
- }
s->mode = 3;
s->gate = (i != 2);
pit_load_count(s, 0);
}
+}
+
+PITState *pit_init(int base, int irq)
+{
+ PITState *pit = &pit_state;
+ PITChannelState *s;
+
+ s = &pit->channels[0];
+ /* the timer 0 is connected to an IRQ */
+ s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s);
+ s->irq = irq;
register_savevm("i8254", base, 1, pit_save, pit_load, pit);
+ qemu_register_reset(pit_reset, pit);
register_ioport_write(base, 4, 1, pit_ioport_write, pit);
register_ioport_read(base, 3, 1, pit_ioport_read, pit);
+
+ pit_reset(pit);
+
return pit;
}