Add PowerPC power-management state check callback.

[qemu] / hw / heathrow_pic.c

diff --git a/hw/heathrow_pic.c b/hw/heathrow_pic.c
index d65da9a..96eb656 100644 (file)
--- a/hw/heathrow_pic.c
+++ b/hw/heathrow_pic.c
@@ -1,8 +1,8 @@
 /*
  * Heathrow PIC support (standard PowerMac PIC)
- * 
+ *
  * Copyright (c) 2005 Fabrice Bellard
- * 
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
  * in the Software without restriction, including without limitation the rights
@@ -32,9 +32,9 @@ typedef struct HeathrowPIC {
     uint32_t level_triggered;
 } HeathrowPIC;
 
-struct HeathrowPICS {
+typedef struct HeathrowPICS {
     HeathrowPIC pics[2];
-};
+} HeathrowPICS;
 
 static inline int check_irq(HeathrowPIC *pic)
 {
@@ -45,9 +45,9 @@ static inline int check_irq(HeathrowPIC *pic)
 static void heathrow_pic_update(HeathrowPICS *s)
 {
     if (check_irq(&s->pics[0]) || check_irq(&s->pics[1])) {
-        cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
+        cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD);
     } else {
-        cpu_reset_interrupt(cpu_single_env, CPU_INTERRUPT_HARD);
+        cpu_reset_interrupt(first_cpu, CPU_INTERRUPT_HARD);
     }
 }
 
@@ -88,7 +88,7 @@ static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
     HeathrowPIC *pic;
     unsigned int n;
     uint32_t value;
-    
+
     n = ((addr & 0xfff) - 0x10) >> 4;
     if (n >= 2) {
         value = 0;
@@ -130,7 +130,7 @@ static CPUReadMemoryFunc *pic_read[] = {
 };
 
 
-void heathrow_pic_set_irq(void *opaque, int num, int level)
+static void heathrow_pic_set_irq(void *opaque, int num, int level)
 {
     HeathrowPICS *s = opaque;
     HeathrowPIC *pic;
@@ -156,13 +156,13 @@ void heathrow_pic_set_irq(void *opaque, int num, int level)
     heathrow_pic_update(s);
 }
 
-HeathrowPICS *heathrow_pic_init(int *pmem_index)
+qemu_irq *heathrow_pic_init(int *pmem_index)
 {
     HeathrowPICS *s;
-    
+
     s = qemu_mallocz(sizeof(HeathrowPICS));
     s->pics[0].level_triggered = 0;
     s->pics[1].level_triggered = 0x1ff00000;
     *pmem_index = cpu_register_io_memory(0, pic_read, pic_write, s);
-    return s;
+    return qemu_allocate_irqs(heathrow_pic_set_irq, s, 64);
 }