SCBflash = 12, SCBeeprom = 14, /* EEPROM and flash memory control. */
SCBCtrlMDI = 16, /* MDI interface control. */
SCBEarlyRx = 20, /* Early receive byte count. */
+ SCBFlow = 24,
};
/* A speedo3 transmit buffer descriptor with two buffers... */
{
if (s->int_stat) {
logout("interrupt disabled\n");
- pci_set_irq(s->pci_dev, 0, 0);
+ qemu_irq_lower(s->pci_dev->irq[0]);
s->int_stat = 0;
}
}
{
if (!s->int_stat) {
logout("interrupt enabled\n");
- pci_set_irq(s->pci_dev, 0, 1);
+ qemu_irq_raise(s->pci_dev->irq[0]);
s->int_stat = 1;
}
}
eepro100_interrupt(s, 0);
break;
case SCBPort + 3:
+ case SCBFlow:
+ case SCBFlow + 1:
+ case SCBFlow + 2:
+ case SCBFlow + 3:
logout("addr=%s val=0x%02x\n", regname(addr), val);
break;
case SCBeeprom:
static int nic_load(QEMUFile * f, void *opaque, int version_id)
{
EEPRO100State *s = (EEPRO100State *) opaque;
+ int i;
int ret;
- missing("NIC load");
-
if (version_id > 3)
return -EINVAL;
qemu_get_buffer(f, s->mult, 8);
qemu_get_buffer(f, s->mem, sizeof(s->mem));
+ /* Restore all members of struct between scv_stat and mem */
+ qemu_get_8s(f, &s->scb_stat);
+ qemu_get_8s(f, &s->int_stat);
+ for (i = 0; i < 3; i++)
+ qemu_get_be32s(f, &s->region[i]);
+ qemu_get_buffer(f, s->macaddr, 6);
+ for (i = 0; i < 19; i++)
+ qemu_get_be32s(f, &s->statcounter[i]);
+ for (i = 0; i < 32; i++)
+ qemu_get_be16s(f, &s->mdimem[i]);
+ /* The eeprom should be saved and restored by its own routines */
+ qemu_get_be32s(f, &s->device);
+ qemu_get_be32s(f, &s->pointer);
+ qemu_get_be32s(f, &s->cu_base);
+ qemu_get_be32s(f, &s->cu_offset);
+ qemu_get_be32s(f, &s->ru_base);
+ qemu_get_be32s(f, &s->ru_offset);
+ qemu_get_be32s(f, &s->statsaddr);
+ /* Restore epro100_stats_t statistics */
+ qemu_get_be32s(f, &s->statistics.tx_good_frames);
+ qemu_get_be32s(f, &s->statistics.tx_max_collisions);
+ qemu_get_be32s(f, &s->statistics.tx_late_collisions);
+ qemu_get_be32s(f, &s->statistics.tx_underruns);
+ qemu_get_be32s(f, &s->statistics.tx_lost_crs);
+ qemu_get_be32s(f, &s->statistics.tx_deferred);
+ qemu_get_be32s(f, &s->statistics.tx_single_collisions);
+ qemu_get_be32s(f, &s->statistics.tx_multiple_collisions);
+ qemu_get_be32s(f, &s->statistics.tx_total_collisions);
+ qemu_get_be32s(f, &s->statistics.rx_good_frames);
+ qemu_get_be32s(f, &s->statistics.rx_crc_errors);
+ qemu_get_be32s(f, &s->statistics.rx_alignment_errors);
+ qemu_get_be32s(f, &s->statistics.rx_resource_errors);
+ qemu_get_be32s(f, &s->statistics.rx_overrun_errors);
+ qemu_get_be32s(f, &s->statistics.rx_cdt_errors);
+ qemu_get_be32s(f, &s->statistics.rx_short_frame_errors);
+ qemu_get_be32s(f, &s->statistics.fc_xmt_pause);
+ qemu_get_be32s(f, &s->statistics.fc_rcv_pause);
+ qemu_get_be32s(f, &s->statistics.fc_rcv_unsupported);
+ qemu_get_be16s(f, &s->statistics.xmt_tco_frames);
+ qemu_get_be16s(f, &s->statistics.rcv_tco_frames);
+ qemu_get_be32s(f, &s->statistics.complete);
+#if 0
+ qemu_get_be16s(f, &s->status);
+#endif
+
+ /* Configuration bytes. */
+ qemu_get_buffer(f, s->configuration, sizeof(s->configuration));
+
return 0;
}
static void nic_save(QEMUFile * f, void *opaque)
{
EEPRO100State *s = (EEPRO100State *) opaque;
-
- missing("NIC save");
+ int i;
if (s->pci_dev)
pci_device_save(s->pci_dev, f);
qemu_put_8s(f, &s->curpag);
qemu_put_buffer(f, s->mult, 8);
qemu_put_buffer(f, s->mem, sizeof(s->mem));
+
+ /* Save all members of struct between scv_stat and mem */
+ qemu_put_8s(f, &s->scb_stat);
+ qemu_put_8s(f, &s->int_stat);
+ for (i = 0; i < 3; i++)
+ qemu_put_be32s(f, &s->region[i]);
+ qemu_put_buffer(f, s->macaddr, 6);
+ for (i = 0; i < 19; i++)
+ qemu_put_be32s(f, &s->statcounter[i]);
+ for (i = 0; i < 32; i++)
+ qemu_put_be16s(f, &s->mdimem[i]);
+ /* The eeprom should be saved and restored by its own routines */
+ qemu_put_be32s(f, &s->device);
+ qemu_put_be32s(f, &s->pointer);
+ qemu_put_be32s(f, &s->cu_base);
+ qemu_put_be32s(f, &s->cu_offset);
+ qemu_put_be32s(f, &s->ru_base);
+ qemu_put_be32s(f, &s->ru_offset);
+ qemu_put_be32s(f, &s->statsaddr);
+ /* Save epro100_stats_t statistics */
+ qemu_put_be32s(f, &s->statistics.tx_good_frames);
+ qemu_put_be32s(f, &s->statistics.tx_max_collisions);
+ qemu_put_be32s(f, &s->statistics.tx_late_collisions);
+ qemu_put_be32s(f, &s->statistics.tx_underruns);
+ qemu_put_be32s(f, &s->statistics.tx_lost_crs);
+ qemu_put_be32s(f, &s->statistics.tx_deferred);
+ qemu_put_be32s(f, &s->statistics.tx_single_collisions);
+ qemu_put_be32s(f, &s->statistics.tx_multiple_collisions);
+ qemu_put_be32s(f, &s->statistics.tx_total_collisions);
+ qemu_put_be32s(f, &s->statistics.rx_good_frames);
+ qemu_put_be32s(f, &s->statistics.rx_crc_errors);
+ qemu_put_be32s(f, &s->statistics.rx_alignment_errors);
+ qemu_put_be32s(f, &s->statistics.rx_resource_errors);
+ qemu_put_be32s(f, &s->statistics.rx_overrun_errors);
+ qemu_put_be32s(f, &s->statistics.rx_cdt_errors);
+ qemu_put_be32s(f, &s->statistics.rx_short_frame_errors);
+ qemu_put_be32s(f, &s->statistics.fc_xmt_pause);
+ qemu_put_be32s(f, &s->statistics.fc_rcv_pause);
+ qemu_put_be32s(f, &s->statistics.fc_rcv_unsupported);
+ qemu_put_be16s(f, &s->statistics.xmt_tco_frames);
+ qemu_put_be16s(f, &s->statistics.rcv_tco_frames);
+ qemu_put_be32s(f, &s->statistics.complete);
+#if 0
+ qemu_put_be16s(f, &s->status);
+#endif
+
+ /* Configuration bytes. */
+ qemu_put_buffer(f, s->configuration, sizeof(s->configuration));
}
static void nic_init(PCIBus * bus, NICInfo * nd,