* License along with this library; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+#include "config.h"
#include <stdlib.h>
#include <stdio.h>
#include <stdarg.h>
#include <errno.h>
#include <unistd.h>
#include <inttypes.h>
+#if !defined(CONFIG_SOFTMMU)
#include <sys/mman.h>
+#endif
-#include "config.h"
#include "cpu.h"
#include "exec-all.h"
int phys_ram_size;
int phys_ram_fd;
uint8_t *phys_ram_base;
+uint8_t *phys_ram_dirty;
typedef struct PageDesc {
/* offset in memory of the page + io_index in the low 12 bits */
{
/* NOTE: we can always suppose that host_page_size >=
TARGET_PAGE_SIZE */
+#ifdef _WIN32
+ real_host_page_size = 4096;
+#else
real_host_page_size = getpagesize();
+#endif
if (host_page_size == 0)
host_page_size = real_host_page_size;
if (host_page_size < TARGET_PAGE_SIZE)
p = *lp;
if (!p) {
/* allocate if not found */
- p = malloc(sizeof(PageDesc) * L2_SIZE);
+ p = qemu_malloc(sizeof(PageDesc) * L2_SIZE);
memset(p, 0, sizeof(PageDesc) * L2_SIZE);
*lp = p;
}
#if !defined(CONFIG_USER_ONLY)
static void tlb_protect_code(CPUState *env, uint32_t addr);
static void tlb_unprotect_code(CPUState *env, uint32_t addr);
-static void tlb_unprotect_code_phys(CPUState *env, uint32_t phys_addr);
+static void tlb_unprotect_code_phys(CPUState *env, uint32_t phys_addr, target_ulong vaddr);
static inline VirtPageDesc *virt_page_find_alloc(unsigned int index)
{
p = *lp;
if (!p) {
/* allocate if not found */
- p = malloc(sizeof(VirtPageDesc) * L2_SIZE);
+ p = qemu_malloc(sizeof(VirtPageDesc) * L2_SIZE);
memset(p, 0, sizeof(VirtPageDesc) * L2_SIZE);
*lp = p;
}
static inline void invalidate_page_bitmap(PageDesc *p)
{
if (p->code_bitmap) {
- free(p->code_bitmap);
+ qemu_free(p->code_bitmap);
p->code_bitmap = NULL;
}
p->code_write_count = 0;
nb_tbs,
nb_tbs > 0 ? (code_gen_ptr - code_gen_buffer) / nb_tbs : 0);
#endif
- /* must reset current TB so that interrupts cannot modify the
- links while we are modifying them */
- env->current_tb = NULL;
-
nb_tbs = 0;
for(i = 0;i < CODE_GEN_HASH_SIZE; i++)
tb_hash[i] = NULL;
TranslationBlock *tb1, *tb2, **ptb;
tb_invalidated_flag = 1;
-
+
/* remove the TB from the hash list */
h = tb_hash_func(tb->pc);
ptb = &tb_hash[h];
int n, tb_start, tb_end;
TranslationBlock *tb;
- p->code_bitmap = malloc(TARGET_PAGE_SIZE / 8);
+ p->code_bitmap = qemu_malloc(TARGET_PAGE_SIZE / 8);
if (!p->code_bitmap)
return;
memset(p->code_bitmap, 0, TARGET_PAGE_SIZE / 8);
/* invalidate all TBs which intersect with the target physical page
starting in range [start;end[. NOTE: start and end must refer to
- the same physical page */
-static void tb_invalidate_phys_page_range(target_ulong start, target_ulong end)
+ the same physical page. 'vaddr' is a virtual address referencing
+ the physical page of code. It is only used an a hint if there is no
+ code left. */
+static void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
+ target_ulong vaddr)
{
int n;
PageDesc *p;
/* if no code remaining, no need to continue to use slow writes */
if (!p->first_tb) {
invalidate_page_bitmap(p);
- tlb_unprotect_code_phys(cpu_single_env, start);
+ tlb_unprotect_code_phys(cpu_single_env, start, vaddr);
}
#endif
}
/* len must be <= 8 and start must be a multiple of len */
-static inline void tb_invalidate_phys_page_fast(target_ulong start, int len)
+static inline void tb_invalidate_phys_page_fast(target_ulong start, int len, target_ulong vaddr)
{
PageDesc *p;
int offset, b;
-
+#if 0
+ if (cpu_single_env->cr[0] & CR0_PE_MASK) {
+ printf("modifying code at 0x%x size=%d EIP=%x\n",
+ (vaddr & TARGET_PAGE_MASK) | (start & ~TARGET_PAGE_MASK), len,
+ cpu_single_env->eip);
+ }
+#endif
p = page_find(start >> TARGET_PAGE_BITS);
if (!p)
return;
goto do_invalidate;
} else {
do_invalidate:
- tb_invalidate_phys_page_range(start, start + len);
+ tb_invalidate_phys_page_range(start, start + len, vaddr);
}
}
return NULL;
tb = &tbs[nb_tbs++];
tb->pc = pc;
+ tb->cflags = 0;
return tb;
}
}
#endif
vp->phys_addr = tb->page_addr[0];
- vp->valid_tag = virt_valid_tag;
+ if (vp->valid_tag != virt_valid_tag) {
+ vp->valid_tag = virt_valid_tag;
+#if !defined(CONFIG_SOFTMMU)
+ vp->prot = 0;
+#endif
+ }
if (tb->page_addr[1] != -1) {
addr += TARGET_PAGE_SIZE;
}
#endif
vp->phys_addr = tb->page_addr[1];
- vp->valid_tag = virt_valid_tag;
+ if (vp->valid_tag != virt_valid_tag) {
+ vp->valid_tag = virt_valid_tag;
+#if !defined(CONFIG_SOFTMMU)
+ vp->prot = 0;
+#endif
+ }
}
}
#endif
tb->jmp_first = (TranslationBlock *)((long)tb | 2);
tb->jmp_next[0] = NULL;
tb->jmp_next[1] = NULL;
+#ifdef USE_CODE_COPY
+ tb->cflags &= ~CF_FP_USED;
+ if (tb->cflags & CF_TB_FP_USED)
+ tb->cflags |= CF_FP_USED;
+#endif
/* init original jump addresses */
if (tb->tb_next_offset[0] != 0xffff)
void cpu_interrupt(CPUState *env, int mask)
{
TranslationBlock *tb;
-
+ static int interrupt_lock;
+
env->interrupt_request |= mask;
/* if the cpu is currently executing code, we must unlink it and
all the potentially executing TB */
tb = env->current_tb;
- if (tb) {
+ if (tb && !testandset(&interrupt_lock)) {
+ env->current_tb = NULL;
tb_reset_jump_recursive(tb);
+ interrupt_lock = 0;
}
}
+CPULogItem cpu_log_items[] = {
+ { CPU_LOG_TB_OUT_ASM, "out_asm",
+ "show generated host assembly code for each compiled TB" },
+ { CPU_LOG_TB_IN_ASM, "in_asm",
+ "show target assembly code for each compiled TB" },
+ { CPU_LOG_TB_OP, "op",
+ "show micro ops for each compiled TB (only usable if 'in_asm' used)" },
+#ifdef TARGET_I386
+ { CPU_LOG_TB_OP_OPT, "op_opt",
+ "show micro ops after optimization for each compiled TB" },
+#endif
+ { CPU_LOG_INT, "int",
+ "show interrupts/exceptions in short format" },
+ { CPU_LOG_EXEC, "exec",
+ "show trace before each executed TB (lots of logs)" },
+#ifdef TARGET_I386
+ { CPU_LOG_PCALL, "pcall",
+ "show protected mode far calls/returns/exceptions" },
+#endif
+ { 0, NULL, NULL },
+};
+
+static int cmp1(const char *s1, int n, const char *s2)
+{
+ if (strlen(s2) != n)
+ return 0;
+ return memcmp(s1, s2, n) == 0;
+}
+
+/* takes a comma separated list of log masks. Return 0 if error. */
+int cpu_str_to_log_mask(const char *str)
+{
+ CPULogItem *item;
+ int mask;
+ const char *p, *p1;
+
+ p = str;
+ mask = 0;
+ for(;;) {
+ p1 = strchr(p, ',');
+ if (!p1)
+ p1 = p + strlen(p);
+ for(item = cpu_log_items; item->mask != 0; item++) {
+ if (cmp1(p, p1 - p, item->name))
+ goto found;
+ }
+ return 0;
+ found:
+ mask |= item->mask;
+ if (*p1 != ',')
+ break;
+ p = p1 + 1;
+ }
+ return mask;
+}
void cpu_abort(CPUState *env, const char *fmt, ...)
{
#if !defined(CONFIG_USER_ONLY)
-void tlb_flush(CPUState *env)
+/* NOTE: if flush_global is true, also flush global entries (not
+ implemented yet) */
+void tlb_flush(CPUState *env, int flush_global)
{
int i;
(TARGET_PAGE_MASK | TLB_INVALID_MASK)) &&
(tlb_entry->address & ~TARGET_PAGE_MASK) != IO_MEM_CODE &&
(tlb_entry->address & ~TARGET_PAGE_MASK) != IO_MEM_ROM) {
- tlb_entry->address |= IO_MEM_CODE;
- tlb_entry->addend -= (unsigned long)phys_ram_base;
+ tlb_entry->address = (tlb_entry->address & TARGET_PAGE_MASK) | IO_MEM_CODE;
}
}
if (addr == (tlb_entry->address &
(TARGET_PAGE_MASK | TLB_INVALID_MASK)) &&
(tlb_entry->address & ~TARGET_PAGE_MASK) == IO_MEM_CODE) {
- tlb_entry->address &= TARGET_PAGE_MASK;
- tlb_entry->addend += (unsigned long)phys_ram_base;
+ tlb_entry->address = (tlb_entry->address & TARGET_PAGE_MASK) | IO_MEM_NOTDIRTY;
}
}
{
if ((tlb_entry->address & ~TARGET_PAGE_MASK) == IO_MEM_CODE &&
((tlb_entry->address & TARGET_PAGE_MASK) + tlb_entry->addend) == phys_addr) {
- tlb_entry->address &= TARGET_PAGE_MASK;
- tlb_entry->addend += (unsigned long)phys_ram_base;
+ tlb_entry->address = (tlb_entry->address & TARGET_PAGE_MASK) | IO_MEM_NOTDIRTY;
}
}
/* update the TLB so that writes in physical page 'phys_addr' are no longer
tested self modifying code */
-/* XXX: find a way to improve it */
-static void tlb_unprotect_code_phys(CPUState *env, uint32_t phys_addr)
+static void tlb_unprotect_code_phys(CPUState *env, uint32_t phys_addr, target_ulong vaddr)
{
int i;
phys_addr &= TARGET_PAGE_MASK;
+ phys_addr += (long)phys_ram_base;
+ i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ tlb_unprotect_code2(&env->tlb_write[0][i], phys_addr);
+ tlb_unprotect_code2(&env->tlb_write[1][i], phys_addr);
+}
+
+static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
+ unsigned long start, unsigned long length)
+{
+ unsigned long addr;
+ if ((tlb_entry->address & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {
+ addr = (tlb_entry->address & TARGET_PAGE_MASK) + tlb_entry->addend;
+ if ((addr - start) < length) {
+ tlb_entry->address = (tlb_entry->address & TARGET_PAGE_MASK) | IO_MEM_NOTDIRTY;
+ }
+ }
+}
+
+void cpu_physical_memory_reset_dirty(target_ulong start, target_ulong end)
+{
+ CPUState *env;
+ target_ulong length, start1;
+ int i;
+
+ start &= TARGET_PAGE_MASK;
+ end = TARGET_PAGE_ALIGN(end);
+
+ length = end - start;
+ if (length == 0)
+ return;
+ memset(phys_ram_dirty + (start >> TARGET_PAGE_BITS), 0, length >> TARGET_PAGE_BITS);
+
+ env = cpu_single_env;
+ /* we modify the TLB cache so that the dirty bit will be set again
+ when accessing the range */
+ start1 = start + (unsigned long)phys_ram_base;
for(i = 0; i < CPU_TLB_SIZE; i++)
- tlb_unprotect_code2(&env->tlb_write[0][i], phys_addr);
+ tlb_reset_dirty_range(&env->tlb_write[0][i], start1, length);
for(i = 0; i < CPU_TLB_SIZE; i++)
- tlb_unprotect_code2(&env->tlb_write[1][i], phys_addr);
+ tlb_reset_dirty_range(&env->tlb_write[1][i], start1, length);
+
+#if !defined(CONFIG_SOFTMMU)
+ /* XXX: this is expensive */
+ {
+ VirtPageDesc *p;
+ int j;
+ target_ulong addr;
+
+ for(i = 0; i < L1_SIZE; i++) {
+ p = l1_virt_map[i];
+ if (p) {
+ addr = i << (TARGET_PAGE_BITS + L2_BITS);
+ for(j = 0; j < L2_SIZE; j++) {
+ if (p->valid_tag == virt_valid_tag &&
+ p->phys_addr >= start && p->phys_addr < end &&
+ (p->prot & PROT_WRITE)) {
+ if (addr < MMAP_AREA_END) {
+ mprotect((void *)addr, TARGET_PAGE_SIZE,
+ p->prot & ~PROT_WRITE);
+ }
+ }
+ addr += TARGET_PAGE_SIZE;
+ p++;
+ }
+ }
+ }
+ }
+#endif
}
-/* add a new TLB entry. At most one entry for a given virtual
- address is permitted. */
+static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry,
+ unsigned long start)
+{
+ unsigned long addr;
+ if ((tlb_entry->address & ~TARGET_PAGE_MASK) == IO_MEM_NOTDIRTY) {
+ addr = (tlb_entry->address & TARGET_PAGE_MASK) + tlb_entry->addend;
+ if (addr == start) {
+ tlb_entry->address = (tlb_entry->address & TARGET_PAGE_MASK) | IO_MEM_RAM;
+ }
+ }
+}
+
+/* update the TLB corresponding to virtual page vaddr and phys addr
+ addr so that it is no longer dirty */
+static inline void tlb_set_dirty(unsigned long addr, target_ulong vaddr)
+{
+ CPUState *env = cpu_single_env;
+ int i;
+
+ phys_ram_dirty[(addr - (unsigned long)phys_ram_base) >> TARGET_PAGE_BITS] = 1;
+
+ addr &= TARGET_PAGE_MASK;
+ i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ tlb_set_dirty1(&env->tlb_write[0][i], addr);
+ tlb_set_dirty1(&env->tlb_write[1][i], addr);
+}
+
+/* add a new TLB entry. At most one entry for a given virtual address
+ is permitted. Return 0 if OK or 2 if the page could not be mapped
+ (can only happen in non SOFTMMU mode for I/O pages or pages
+ conflicting with the host address space). */
int tlb_set_page(CPUState *env, uint32_t vaddr, uint32_t paddr, int prot,
int is_user, int is_softmmu)
{
index = (vaddr >> 12) & (CPU_TLB_SIZE - 1);
addend -= vaddr;
- if (prot & PROT_READ) {
+ if (prot & PAGE_READ) {
env->tlb_read[is_user][index].address = address;
env->tlb_read[is_user][index].addend = addend;
} else {
env->tlb_read[is_user][index].address = -1;
env->tlb_read[is_user][index].addend = -1;
}
- if (prot & PROT_WRITE) {
+ if (prot & PAGE_WRITE) {
if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM) {
/* ROM: access is ignored (same as unassigned) */
env->tlb_write[is_user][index].address = vaddr | IO_MEM_ROM;
- env->tlb_write[is_user][index].addend = addend - (unsigned long)phys_ram_base;
+ env->tlb_write[is_user][index].addend = addend;
} else if (first_tb) {
/* if code is present, we use a specific memory
handler. It works only for physical memory access */
env->tlb_write[is_user][index].address = vaddr | IO_MEM_CODE;
- env->tlb_write[is_user][index].addend = addend - (unsigned long)phys_ram_base;
+ env->tlb_write[is_user][index].addend = addend;
+ } else if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM &&
+ !cpu_physical_memory_is_dirty(pd)) {
+ env->tlb_write[is_user][index].address = vaddr | IO_MEM_NOTDIRTY;
+ env->tlb_write[is_user][index].addend = addend;
} else {
env->tlb_write[is_user][index].address = address;
env->tlb_write[is_user][index].addend = addend;
ret = 2;
} else {
void *map_addr;
- if (prot & PROT_WRITE) {
- if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM || first_tb) {
- /* ROM: we do as if code was inside */
- /* if code is present, we only map as read only and save the
- original mapping */
- VirtPageDesc *vp;
-
- vp = virt_page_find_alloc(vaddr >> TARGET_PAGE_BITS);
- vp->phys_addr = pd;
- vp->prot = prot;
- vp->valid_tag = virt_valid_tag;
- prot &= ~PAGE_WRITE;
+
+ if (vaddr >= MMAP_AREA_END) {
+ ret = 2;
+ } else {
+ if (prot & PROT_WRITE) {
+ if ((pd & ~TARGET_PAGE_MASK) == IO_MEM_ROM ||
+ first_tb ||
+ ((pd & ~TARGET_PAGE_MASK) == IO_MEM_RAM &&
+ !cpu_physical_memory_is_dirty(pd))) {
+ /* ROM: we do as if code was inside */
+ /* if code is present, we only map as read only and save the
+ original mapping */
+ VirtPageDesc *vp;
+
+ vp = virt_page_find_alloc(vaddr >> TARGET_PAGE_BITS);
+ vp->phys_addr = pd;
+ vp->prot = prot;
+ vp->valid_tag = virt_valid_tag;
+ prot &= ~PAGE_WRITE;
+ }
+ }
+ map_addr = mmap((void *)vaddr, TARGET_PAGE_SIZE, prot,
+ MAP_SHARED | MAP_FIXED, phys_ram_fd, (pd & TARGET_PAGE_MASK));
+ if (map_addr == MAP_FAILED) {
+ cpu_abort(env, "mmap failed when mapped physical address 0x%08x to virtual address 0x%08x\n",
+ paddr, vaddr);
}
- }
- map_addr = mmap((void *)vaddr, TARGET_PAGE_SIZE, prot,
- MAP_SHARED | MAP_FIXED, phys_ram_fd, (pd & TARGET_PAGE_MASK));
- if (map_addr == MAP_FAILED) {
- cpu_abort(env, "mmap failed when mapped physical address 0x%08x to virtual address 0x%08x\n",
- paddr, vaddr);
}
}
}
printf("page_unprotect: addr=0x%08x\n", addr);
#endif
addr &= TARGET_PAGE_MASK;
+
+ /* if it is not mapped, no need to worry here */
+ if (addr >= MMAP_AREA_END)
+ return 0;
vp = virt_page_find(addr >> TARGET_PAGE_BITS);
if (!vp)
return 0;
printf("page_unprotect: addr=0x%08x phys_addr=0x%08x prot=%x\n",
addr, vp->phys_addr, vp->prot);
#endif
+ /* set the dirty bit */
+ phys_ram_dirty[vp->phys_addr >> TARGET_PAGE_BITS] = 1;
+ /* flush the code inside */
tb_invalidate_phys_page(vp->phys_addr);
- mprotect((void *)addr, TARGET_PAGE_SIZE, vp->prot);
+ if (mprotect((void *)addr, TARGET_PAGE_SIZE, vp->prot) < 0)
+ cpu_abort(cpu_single_env, "error mprotect addr=0x%lx prot=%d\n",
+ (unsigned long)addr, vp->prot);
return 1;
#else
return 0;
#else
-void tlb_flush(CPUState *env)
+void tlb_flush(CPUState *env, int flush_global)
{
}
}
}
+static inline void tlb_set_dirty(unsigned long addr, target_ulong vaddr)
+{
+}
+
#endif /* defined(CONFIG_USER_ONLY) */
/* register physical memory. 'size' must be a multiple of the target
return 0;
}
-static void unassigned_mem_writeb(uint32_t addr, uint32_t val)
+static void unassigned_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
{
}
/* self modifying code support in soft mmu mode : writing to a page
containing code comes to these functions */
-static void code_mem_writeb(uint32_t addr, uint32_t val)
+static void code_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
{
+ unsigned long phys_addr;
+
+ phys_addr = addr - (long)phys_ram_base;
#if !defined(CONFIG_USER_ONLY)
- tb_invalidate_phys_page_fast(addr, 1);
+ tb_invalidate_phys_page_fast(phys_addr, 1, vaddr);
#endif
- stb_raw(phys_ram_base + addr, val);
+ stb_raw((uint8_t *)addr, val);
+ phys_ram_dirty[phys_addr >> TARGET_PAGE_BITS] = 1;
}
-static void code_mem_writew(uint32_t addr, uint32_t val)
+static void code_mem_writew(uint32_t addr, uint32_t val, uint32_t vaddr)
{
+ unsigned long phys_addr;
+
+ phys_addr = addr - (long)phys_ram_base;
#if !defined(CONFIG_USER_ONLY)
- tb_invalidate_phys_page_fast(addr, 2);
+ tb_invalidate_phys_page_fast(phys_addr, 2, vaddr);
#endif
- stw_raw(phys_ram_base + addr, val);
+ stw_raw((uint8_t *)addr, val);
+ phys_ram_dirty[phys_addr >> TARGET_PAGE_BITS] = 1;
}
-static void code_mem_writel(uint32_t addr, uint32_t val)
+static void code_mem_writel(uint32_t addr, uint32_t val, uint32_t vaddr)
{
+ unsigned long phys_addr;
+
+ phys_addr = addr - (long)phys_ram_base;
#if !defined(CONFIG_USER_ONLY)
- tb_invalidate_phys_page_fast(addr, 4);
+ tb_invalidate_phys_page_fast(phys_addr, 4, vaddr);
#endif
- stl_raw(phys_ram_base + addr, val);
+ stl_raw((uint8_t *)addr, val);
+ phys_ram_dirty[phys_addr >> TARGET_PAGE_BITS] = 1;
}
static CPUReadMemoryFunc *code_mem_read[3] = {
code_mem_writel,
};
+static void notdirty_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
+{
+ stb_raw((uint8_t *)addr, val);
+ tlb_set_dirty(addr, vaddr);
+}
+
+static void notdirty_mem_writew(uint32_t addr, uint32_t val, uint32_t vaddr)
+{
+ stw_raw((uint8_t *)addr, val);
+ tlb_set_dirty(addr, vaddr);
+}
+
+static void notdirty_mem_writel(uint32_t addr, uint32_t val, uint32_t vaddr)
+{
+ stl_raw((uint8_t *)addr, val);
+ tlb_set_dirty(addr, vaddr);
+}
+
+static CPUWriteMemoryFunc *notdirty_mem_write[3] = {
+ notdirty_mem_writeb,
+ notdirty_mem_writew,
+ notdirty_mem_writel,
+};
+
static void io_mem_init(void)
{
cpu_register_io_memory(IO_MEM_ROM >> IO_MEM_SHIFT, code_mem_read, unassigned_mem_write);
cpu_register_io_memory(IO_MEM_UNASSIGNED >> IO_MEM_SHIFT, unassigned_mem_read, unassigned_mem_write);
cpu_register_io_memory(IO_MEM_CODE >> IO_MEM_SHIFT, code_mem_read, code_mem_write);
- io_mem_nb = 4;
+ cpu_register_io_memory(IO_MEM_NOTDIRTY >> IO_MEM_SHIFT, code_mem_read, notdirty_mem_write);
+ io_mem_nb = 5;
+
+ /* alloc dirty bits array */
+ phys_ram_dirty = qemu_malloc(phys_ram_size >> TARGET_PAGE_BITS);
}
/* mem_read and mem_write are arrays of functions containing the
return io_index << IO_MEM_SHIFT;
}
+/* physical memory access (slow version, mainly for debug) */
+#if defined(CONFIG_USER_ONLY)
+void cpu_physical_memory_rw(target_ulong addr, uint8_t *buf,
+ int len, int is_write)
+{
+ int l, flags;
+ target_ulong page;
+
+ while (len > 0) {
+ page = addr & TARGET_PAGE_MASK;
+ l = (page + TARGET_PAGE_SIZE) - addr;
+ if (l > len)
+ l = len;
+ flags = page_get_flags(page);
+ if (!(flags & PAGE_VALID))
+ return;
+ if (is_write) {
+ if (!(flags & PAGE_WRITE))
+ return;
+ memcpy((uint8_t *)addr, buf, len);
+ } else {
+ if (!(flags & PAGE_READ))
+ return;
+ memcpy(buf, (uint8_t *)addr, len);
+ }
+ len -= l;
+ buf += l;
+ addr += l;
+ }
+}
+#else
+void cpu_physical_memory_rw(target_ulong addr, uint8_t *buf,
+ int len, int is_write)
+{
+ int l, io_index;
+ uint8_t *ptr;
+ uint32_t val;
+ target_ulong page, pd;
+ PageDesc *p;
+
+ while (len > 0) {
+ page = addr & TARGET_PAGE_MASK;
+ l = (page + TARGET_PAGE_SIZE) - addr;
+ if (l > len)
+ l = len;
+ p = page_find(page >> TARGET_PAGE_BITS);
+ if (!p) {
+ pd = IO_MEM_UNASSIGNED;
+ } else {
+ pd = p->phys_offset;
+ }
+
+ if (is_write) {
+ if ((pd & ~TARGET_PAGE_MASK) != 0) {
+ io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
+ if (l >= 4 && ((addr & 3) == 0)) {
+ /* 32 bit read access */
+ val = ldl_raw(buf);
+ io_mem_write[io_index][2](addr, val, 0);
+ l = 4;
+ } else if (l >= 2 && ((addr & 1) == 0)) {
+ /* 16 bit read access */
+ val = lduw_raw(buf);
+ io_mem_write[io_index][1](addr, val, 0);
+ l = 2;
+ } else {
+ /* 8 bit access */
+ val = ldub_raw(buf);
+ io_mem_write[io_index][0](addr, val, 0);
+ l = 1;
+ }
+ } else {
+ unsigned long addr1;
+ addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
+ /* RAM case */
+ ptr = phys_ram_base + addr1;
+ memcpy(ptr, buf, l);
+ /* invalidate code */
+ tb_invalidate_phys_page_range(addr1, addr1 + l, 0);
+ /* set dirty bit */
+ phys_ram_dirty[page >> TARGET_PAGE_BITS] = 1;
+ }
+ } else {
+ if ((pd & ~TARGET_PAGE_MASK) > IO_MEM_ROM &&
+ (pd & ~TARGET_PAGE_MASK) != IO_MEM_CODE) {
+ /* I/O case */
+ io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
+ if (l >= 4 && ((addr & 3) == 0)) {
+ /* 32 bit read access */
+ val = io_mem_read[io_index][2](addr);
+ stl_raw(buf, val);
+ l = 4;
+ } else if (l >= 2 && ((addr & 1) == 0)) {
+ /* 16 bit read access */
+ val = io_mem_read[io_index][1](addr);
+ stw_raw(buf, val);
+ l = 2;
+ } else {
+ /* 8 bit access */
+ val = io_mem_read[io_index][0](addr);
+ stb_raw(buf, val);
+ l = 1;
+ }
+ } else {
+ /* RAM case */
+ ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +
+ (addr & ~TARGET_PAGE_MASK);
+ memcpy(buf, ptr, l);
+ }
+ }
+ len -= l;
+ buf += l;
+ addr += l;
+ }
+}
+#endif
+
+/* virtual memory access for debug */
+int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
+ uint8_t *buf, int len, int is_write)
+{
+ int l;
+ target_ulong page, phys_addr;
+
+ while (len > 0) {
+ page = addr & TARGET_PAGE_MASK;
+ phys_addr = cpu_get_phys_page_debug(env, page);
+ /* if no physical page mapped, return an error */
+ if (phys_addr == -1)
+ return -1;
+ l = (page + TARGET_PAGE_SIZE) - addr;
+ if (l > len)
+ l = len;
+ cpu_physical_memory_rw(phys_addr + (addr & ~TARGET_PAGE_MASK),
+ buf, l, is_write);
+ len -= l;
+ buf += l;
+ addr += l;
+ }
+ return 0;
+}
+
#if !defined(CONFIG_USER_ONLY)
#define MMUSUFFIX _cmmu
projects / qemu / blobdiff