+short term:
+----------
+- handle fast timers + add explicit clocks
+- OS/2 install bug
+- handle Self Modifying Code even if modifying current TB (BE OS 5 install)
+- physical memory cache (reduce qemu-fast address space size to about 32 MB)
+- better code fetch
+- XP security bug
+- cycle counter for all archs
+- TLB code protection support for PPC
+- add sysenter/sysexit and fxsr for L4 pistachio 686
+- basic VGA optimizations
+- disable SMC handling for ARM/SPARC/PPC
+- see undefined flags for BTx insn
- user/kernel PUSHL/POPL in helper.c
- keyboard output buffer filling timing emulation
-- verify tb_flush() with a20 and TLBs
-
+- return UD exception if LOCK prefix incorrectly used
- cmos clock update and timers
- test ldt limit < 7 ?
- tests for each target CPU
-- optimize FPU operations (evaluate x87 stack pointer statically) and
- fix cr0.TS emulation
-- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
-- sysenter/sysexit emulation
- fix CCOP optimisation
- fix all remaining thread lock issues (must put TBs in a specific invalid
state, find a solution for tb_flush()).
- fix arm fpu rounding (at least for float->integer conversions)
+- SMP support
lower priority:
--------------
+- suppress shift_mem ops
+- fix some 16 bit sp push/pop overflow (pusha/popa, lcall lret)
+- sysenter/sysexit emulation
+- optimize FPU operations (evaluate x87 stack pointer statically)
- add IPC syscalls
-- SMP support
- use -msoft-float on ARM
- use kernel traps for unaligned accesses on ARM ?
- handle rare page fault cases (in particular if page fault in heplers or