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Add PowerPC power-management state check callback.
[qemu]
/
hw
/
integratorcp.c
diff --git
a/hw/integratorcp.c
b/hw/integratorcp.c
index
c9e1715
..
83c6208
100644
(file)
--- a/
hw/integratorcp.c
+++ b/
hw/integratorcp.c
@@
-1,4
+1,4
@@
-/*
+/*
* ARM Integrator CP System emulation.
*
* Copyright (c) 2005-2007 CodeSourcery.
* ARM Integrator CP System emulation.
*
* Copyright (c) 2005-2007 CodeSourcery.
@@
-257,7
+257,7
@@
static void integratorcm_init(int memsz, uint32_t flash_offset)
iomemtype = cpu_register_io_memory(0, integratorcm_readfn,
integratorcm_writefn, s);
iomemtype = cpu_register_io_memory(0, integratorcm_readfn,
integratorcm_writefn, s);
- cpu_register_physical_memory(0x10000000, 0x007fffff, iomemtype);
+ cpu_register_physical_memory(0x10000000, 0x00800000, iomemtype);
integratorcm_do_remap(s, 1);
/* ??? Save/restore. */
}
integratorcm_do_remap(s, 1);
/* ??? Save/restore. */
}
@@
-390,7
+390,7
@@
static qemu_irq *icp_pic_init(uint32_t base,
s->parent_fiq = parent_fiq;
iomemtype = cpu_register_io_memory(0, icp_pic_readfn,
icp_pic_writefn, s);
s->parent_fiq = parent_fiq;
iomemtype = cpu_register_io_memory(0, icp_pic_readfn,
icp_pic_writefn, s);
- cpu_register_physical_memory(base, 0x007fffff, iomemtype);
+ cpu_register_physical_memory(base, 0x00800000, iomemtype);
/* ??? Save/restore. */
return qi;
}
/* ??? Save/restore. */
return qi;
}
@@
-454,7
+454,7
@@
static void icp_control_init(uint32_t base)
s = (icp_control_state *)qemu_mallocz(sizeof(icp_control_state));
iomemtype = cpu_register_io_memory(0, icp_control_readfn,
icp_control_writefn, s);
s = (icp_control_state *)qemu_mallocz(sizeof(icp_control_state));
iomemtype = cpu_register_io_memory(0, icp_control_readfn,
icp_control_writefn, s);
- cpu_register_physical_memory(base, 0x007fffff, iomemtype);
+ cpu_register_physical_memory(base, 0x00800000, iomemtype);
s->base = base;
/* ??? Save/restore. */
}
s->base = base;
/* ??? Save/restore. */
}
@@
-490,6
+490,7
@@
static void integratorcp_init(int ram_size, int vga_ram_size, int boot_device,
cpu_pic[ARM_PIC_CPU_FIQ]);
icp_pic_init(0xca000000, pic[26], NULL);
icp_pit_init(0x13000000, pic, 5);
cpu_pic[ARM_PIC_CPU_FIQ]);
icp_pic_init(0xca000000, pic[26], NULL);
icp_pit_init(0x13000000, pic, 5);
+ pl031_init(0x15000000, pic[8]);
pl011_init(0x16000000, pic[1], serial_hds[0]);
pl011_init(0x17000000, pic[2], serial_hds[1]);
icp_control_init(0xcb000000);
pl011_init(0x16000000, pic[1], serial_hds[0]);
pl011_init(0x17000000, pic[2], serial_hds[1]);
icp_control_init(0xcb000000);
@@
-500,6
+501,9
@@
static void integratorcp_init(int ram_size, int vga_ram_size, int boot_device,
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "smc91c111") == 0) {
smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "smc91c111") == 0) {
smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
+ } else if (strcmp(nd_table[0].model, "?") == 0) {
+ fprintf(stderr, "qemu: Supported NICs: smc91c111\n");
+ exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);