vcs.maemo.org Git - kernel-power/blob - usbhost/drivers/usb/musb/musb_gadget_ep0.c

   1 /*
   2  * MUSB OTG peripheral driver ep0 handling
   3  *
   4  * Copyright 2005 Mentor Graphics Corporation
   5  * Copyright (C) 2005-2006 by Texas Instruments
   6  * Copyright (C) 2006-2007 Nokia Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  *
  22  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25  * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  */
  34
  35 #include <linux/kernel.h>
  36 #include <linux/list.h>
  37 #include <linux/timer.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/init.h>
  40 #include <linux/device.h>
  41 #include <linux/interrupt.h>
  42
  43 #include "musb_core.h"
  44
  45 /* ep0 is always musb->endpoints[0].ep_in */
  46 #define next_ep0_request(musb)  next_in_request(&(musb)->endpoints[0])
  47
  48 /*
  49  * locking note:  we use only the controller lock, for simpler correctness.
  50  * It's always held with IRQs blocked.
  51  *
  52  * It protects the ep0 request queue as well as ep0_state, not just the
  53  * controller and indexed registers.  And that lock stays held unless it
  54  * needs to be dropped to allow reentering this driver ... like upcalls to
  55  * the gadget driver, or adjusting endpoint halt status.
  56  */
  57
  58 static inline char *decode_ep0stage(u8 stage)
  59 {
  60         switch (stage) {
  61         case MUSB_EP0_STAGE_SETUP:      return "idle";
  62         case MUSB_EP0_STAGE_TX:         return "in";
  63         case MUSB_EP0_STAGE_RX:         return "out";
  64         case MUSB_EP0_STAGE_ACKWAIT:    return "wait";
  65         case MUSB_EP0_STAGE_STATUSIN:   return "in/status";
  66         case MUSB_EP0_STAGE_STATUSOUT:  return "out/status";
  67         default:                        return "?";
  68         }
  69 }
  70
  71 /* handle a standard GET_STATUS request
  72  * Context:  caller holds controller lock
  73  */
  74 static int service_tx_status_request(
  75         struct musb *musb,
  76         const struct usb_ctrlrequest *ctrlrequest)
  77 {
  78         void __iomem    *mbase = musb->mregs;
  79         int handled = 1;
  80         u8 result[2], epnum = 0;
  81         const u8 recip = ctrlrequest->bRequestType & USB_RECIP_MASK;
  82
  83         result[1] = 0;
  84
  85         switch (recip) {
  86         case USB_RECIP_DEVICE:
  87                 result[0] = musb->is_self_powered << USB_DEVICE_SELF_POWERED;
  88                 result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
  89 #ifdef CONFIG_USB_MUSB_OTG
  90                 if (musb->g.is_otg) {
  91                         result[0] |= musb->g.b_hnp_enable
  92                                 << USB_DEVICE_B_HNP_ENABLE;
  93                         result[0] |= musb->g.a_alt_hnp_support
  94                                 << USB_DEVICE_A_ALT_HNP_SUPPORT;
  95                         result[0] |= musb->g.a_hnp_support
  96                                 << USB_DEVICE_A_HNP_SUPPORT;
  97                 }
  98 #endif
  99                 break;
 100
 101         case USB_RECIP_INTERFACE:
 102                 result[0] = 0;
 103                 break;
 104
 105         case USB_RECIP_ENDPOINT: {
 106                 int             is_in;
 107                 struct musb_ep  *ep;
 108                 u16             tmp;
 109                 void __iomem    *regs;
 110
 111                 epnum = (u8) ctrlrequest->wIndex;
 112                 if (!epnum) {
 113                         result[0] = 0;
 114                         break;
 115                 }
 116
 117                 is_in = epnum & USB_DIR_IN;
 118                 if (is_in) {
 119                         epnum &= 0x0f;
 120                         ep = &musb->endpoints[epnum].ep_in;
 121                 } else {
 122                         ep = &musb->endpoints[epnum].ep_out;
 123                 }
 124                 regs = musb->endpoints[epnum].regs;
 125
 126                 if (epnum >= MUSB_C_NUM_EPS || !ep->desc) {
 127                         handled = -EINVAL;
 128                         break;
 129                 }
 130
 131                 musb_ep_select(mbase, epnum);
 132                 if (is_in)
 133                         tmp = musb_readw(regs, MUSB_TXCSR)
 134                                                 & MUSB_TXCSR_P_SENDSTALL;
 135                 else
 136                         tmp = musb_readw(regs, MUSB_RXCSR)
 137                                                 & MUSB_RXCSR_P_SENDSTALL;
 138                 musb_ep_select(mbase, 0);
 139
 140                 result[0] = tmp ? 1 : 0;
 141                 } break;
 142
 143         default:
 144                 /* class, vendor, etc ... delegate */
 145                 handled = 0;
 146                 break;
 147         }
 148
 149         /* fill up the fifo; caller updates csr0 */
 150         if (handled > 0) {
 151                 u16     len = le16_to_cpu(ctrlrequest->wLength);
 152
 153                 if (len > 2)
 154                         len = 2;
 155                 musb_write_fifo(&musb->endpoints[0], len, result);
 156         }
 157
 158         return handled;
 159 }
 160
 161 /*
 162  * handle a control-IN request, the end0 buffer contains the current request
 163  * that is supposed to be a standard control request. Assumes the fifo to
 164  * be at least 2 bytes long.
 165  *
 166  * @return 0 if the request was NOT HANDLED,
 167  * < 0 when error
 168  * > 0 when the request is processed
 169  *
 170  * Context:  caller holds controller lock
 171  */
 172 static int
 173 service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
 174 {
 175         int handled = 0;        /* not handled */
 176
 177         if ((ctrlrequest->bRequestType & USB_TYPE_MASK)
 178                         == USB_TYPE_STANDARD) {
 179                 switch (ctrlrequest->bRequest) {
 180                 case USB_REQ_GET_STATUS:
 181                         handled = service_tx_status_request(musb,
 182                                         ctrlrequest);
 183                         break;
 184
 185                 /* case USB_REQ_SYNC_FRAME: */
 186
 187                 default:
 188                         break;
 189                 }
 190         }
 191         return handled;
 192 }
 193
 194 /*
 195  * Context:  caller holds controller lock
 196  */
 197 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req)
 198 {
 199         musb_g_giveback(&musb->endpoints[0].ep_in, req, 0);
 200 }
 201
 202 /*
 203  * Tries to start B-device HNP negotiation if enabled via sysfs
 204  */
 205 static inline void musb_try_b_hnp_enable(struct musb *musb)
 206 {
 207         void __iomem    *mbase = musb->mregs;
 208         u8              devctl;
 209
 210         DBG(1, "HNP: Setting HR\n");
 211         devctl = musb_readb(mbase, MUSB_DEVCTL);
 212         musb_writeb(mbase, MUSB_DEVCTL, devctl | MUSB_DEVCTL_HR);
 213 }
 214
 215 /*
 216  * Handle all control requests with no DATA stage, including standard
 217  * requests such as:
 218  * USB_REQ_SET_CONFIGURATION, USB_REQ_SET_INTERFACE, unrecognized
 219  *      always delegated to the gadget driver
 220  * USB_REQ_SET_ADDRESS, USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE
 221  *      always handled here, except for class/vendor/... features
 222  *
 223  * Context:  caller holds controller lock
 224  */
 225 static int
 226 service_zero_data_request(struct musb *musb,
 227                 struct usb_ctrlrequest *ctrlrequest)
 228 __releases(musb->lock)
 229 __acquires(musb->lock)
 230 {
 231         int handled = -EINVAL;
 232         void __iomem *mbase = musb->mregs;
 233         const u8 recip = ctrlrequest->bRequestType & USB_RECIP_MASK;
 234
 235         /* the gadget driver handles everything except what we MUST handle */
 236         if ((ctrlrequest->bRequestType & USB_TYPE_MASK)
 237                         == USB_TYPE_STANDARD) {
 238                 switch (ctrlrequest->bRequest) {
 239                 case USB_REQ_SET_ADDRESS:
 240                         /* change it after the status stage */
 241                         musb->set_address = true;
 242                         musb->address = (u8) (ctrlrequest->wValue & 0x7f);
 243                         handled = 1;
 244                         break;
 245
 246                 case USB_REQ_CLEAR_FEATURE:
 247                         switch (recip) {
 248                         case USB_RECIP_DEVICE:
 249                                 if (ctrlrequest->wValue
 250                                                 != USB_DEVICE_REMOTE_WAKEUP)
 251                                         break;
 252                                 musb->may_wakeup = 0;
 253                                 handled = 1;
 254                                 break;
 255                         case USB_RECIP_INTERFACE:
 256                                 break;
 257                         case USB_RECIP_ENDPOINT:{
 258                                 const u8 num = ctrlrequest->wIndex & 0x0f;
 259                                 struct musb_ep *musb_ep;
 260
 261                                 if (num == 0
 262                                                 || num >= MUSB_C_NUM_EPS
 263                                                 || ctrlrequest->wValue
 264                                                         != USB_ENDPOINT_HALT)
 265                                         break;
 266
 267                                 if (ctrlrequest->wIndex & USB_DIR_IN)
 268                                         musb_ep = &musb->endpoints[num].ep_in;
 269                                 else
 270                                         musb_ep = &musb->endpoints[num].ep_out;
 271                                 if (!musb_ep->desc)
 272                                         break;
 273
 274                                 /* REVISIT do it directly, no locking games */
 275                                 spin_unlock(&musb->lock);
 276                                 musb_gadget_set_halt(&musb_ep->end_point, 0);
 277                                 spin_lock(&musb->lock);
 278
 279                                 /* select ep0 again */
 280                                 musb_ep_select(mbase, 0);
 281                                 handled = 1;
 282                                 } break;
 283                         default:
 284                                 /* class, vendor, etc ... delegate */
 285                                 handled = 0;
 286                                 break;
 287                         }
 288                         break;
 289
 290                 case USB_REQ_SET_FEATURE:
 291                         switch (recip) {
 292                         case USB_RECIP_DEVICE:
 293                                 handled = 1;
 294                                 switch (ctrlrequest->wValue) {
 295                                 case USB_DEVICE_REMOTE_WAKEUP:
 296                                         musb->may_wakeup = 1;
 297                                         break;
 298                                 case USB_DEVICE_TEST_MODE:
 299                                         if (musb->g.speed != USB_SPEED_HIGH)
 300                                                 goto stall;
 301                                         if (ctrlrequest->wIndex & 0xff)
 302                                                 goto stall;
 303
 304                                         switch (ctrlrequest->wIndex >> 8) {
 305                                         case 1:
 306                                                 pr_debug("TEST_J\n");
 307                                                 /* TEST_J */
 308                                                 musb->test_mode_nr =
 309                                                         MUSB_TEST_J;
 310                                                 break;
 311                                         case 2:
 312                                                 /* TEST_K */
 313                                                 pr_debug("TEST_K\n");
 314                                                 musb->test_mode_nr =
 315                                                         MUSB_TEST_K;
 316                                                 break;
 317                                         case 3:
 318                                                 /* TEST_SE0_NAK */
 319                                                 pr_debug("TEST_SE0_NAK\n");
 320                                                 musb->test_mode_nr =
 321                                                         MUSB_TEST_SE0_NAK;
 322                                                 break;
 323                                         case 4:
 324                                                 /* TEST_PACKET */
 325                                                 pr_debug("TEST_PACKET\n");
 326                                                 musb->test_mode_nr =
 327                                                         MUSB_TEST_PACKET;
 328                                                 break;
 329                                         default:
 330                                                 goto stall;
 331                                         }
 332
 333                                         /* enter test mode after irq */
 334                                         if (handled > 0)
 335                                                 musb->test_mode = true;
 336                                         break;
 337 #ifdef CONFIG_USB_MUSB_OTG
 338                                 case USB_DEVICE_B_HNP_ENABLE:
 339                                         if (!musb->g.is_otg)
 340                                                 goto stall;
 341                                         musb->g.b_hnp_enable = 1;
 342                                         musb_try_b_hnp_enable(musb);
 343                                         break;
 344                                 case USB_DEVICE_A_HNP_SUPPORT:
 345                                         if (!musb->g.is_otg)
 346                                                 goto stall;
 347                                         musb->g.a_hnp_support = 1;
 348                                         break;
 349                                 case USB_DEVICE_A_ALT_HNP_SUPPORT:
 350                                         if (!musb->g.is_otg)
 351                                                 goto stall;
 352                                         musb->g.a_alt_hnp_support = 1;
 353                                         break;
 354 #endif
 355 stall:
 356                                 default:
 357                                         handled = -EINVAL;
 358                                         break;
 359                                 }
 360                                 break;
 361
 362                         case USB_RECIP_INTERFACE:
 363                                 break;
 364
 365                         case USB_RECIP_ENDPOINT:{
 366                                 const u8                epnum =
 367                                         ctrlrequest->wIndex & 0x0f;
 368                                 struct musb_ep          *musb_ep;
 369                                 struct musb_hw_ep       *ep;
 370                                 void __iomem            *regs;
 371                                 int                     is_in;
 372                                 u16                     csr;
 373
 374                                 if (epnum == 0
 375                                                 || epnum >= MUSB_C_NUM_EPS
 376                                                 || ctrlrequest->wValue
 377                                                         != USB_ENDPOINT_HALT)
 378                                         break;
 379
 380                                 ep = musb->endpoints + epnum;
 381                                 regs = ep->regs;
 382                                 is_in = ctrlrequest->wIndex & USB_DIR_IN;
 383                                 if (is_in)
 384                                         musb_ep = &ep->ep_in;
 385                                 else
 386                                         musb_ep = &ep->ep_out;
 387                                 if (!musb_ep->desc)
 388                                         break;
 389
 390                                 musb_ep_select(mbase, epnum);
 391                                 if (is_in) {
 392                                         csr = musb_readw(regs,
 393                                                         MUSB_TXCSR);
 394                                         if (csr & MUSB_TXCSR_FIFONOTEMPTY)
 395                                                 csr |= MUSB_TXCSR_FLUSHFIFO;
 396                                         csr |= MUSB_TXCSR_P_SENDSTALL
 397                                                 | MUSB_TXCSR_CLRDATATOG
 398                                                 | MUSB_TXCSR_P_WZC_BITS;
 399                                         musb_writew(regs, MUSB_TXCSR,
 400                                                         csr);
 401                                 } else {
 402                                         csr = musb_readw(regs,
 403                                                         MUSB_RXCSR);
 404                                         csr |= MUSB_RXCSR_P_SENDSTALL
 405                                                 | MUSB_RXCSR_FLUSHFIFO
 406                                                 | MUSB_RXCSR_CLRDATATOG
 407                                                 | MUSB_RXCSR_P_WZC_BITS;
 408                                         musb_writew(regs, MUSB_RXCSR,
 409                                                         csr);
 410                                 }
 411
 412                                 /* select ep0 again */
 413                                 musb_ep_select(mbase, 0);
 414                                 handled = 1;
 415                                 } break;
 416
 417                         default:
 418                                 /* class, vendor, etc ... delegate */
 419                                 handled = 0;
 420                                 break;
 421                         }
 422                         break;
 423                 default:
 424                         /* delegate SET_CONFIGURATION, etc */
 425                         handled = 0;
 426                 }
 427         } else
 428                 handled = 0;
 429         return handled;
 430 }
 431
 432 /* we have an ep0out data packet
 433  * Context:  caller holds controller lock
 434  */
 435 static void ep0_rxstate(struct musb *musb)
 436 {
 437         void __iomem            *regs = musb->control_ep->regs;
 438         struct usb_request      *req;
 439         u16                     count, csr;
 440
 441         req = next_ep0_request(musb);
 442
 443         /* read packet and ack; or stall because of gadget driver bug:
 444          * should have provided the rx buffer before setup() returned.
 445          */
 446         if (req) {
 447                 void            *buf = req->buf + req->actual;
 448                 unsigned        len = req->length - req->actual;
 449
 450                 /* read the buffer */
 451                 count = musb_readb(regs, MUSB_COUNT0);
 452                 if (count > len) {
 453                         req->status = -EOVERFLOW;
 454                         count = len;
 455                 }
 456                 musb_read_fifo(&musb->endpoints[0], count, buf);
 457                 req->actual += count;
 458                 csr = MUSB_CSR0_P_SVDRXPKTRDY;
 459                 if (count < 64 || req->actual == req->length) {
 460                         musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
 461                         csr |= MUSB_CSR0_P_DATAEND;
 462                 } else
 463                         req = NULL;
 464         } else
 465                 csr = MUSB_CSR0_P_SVDRXPKTRDY | MUSB_CSR0_P_SENDSTALL;
 466
 467
 468         /* Completion handler may choose to stall, e.g. because the
 469          * message just received holds invalid data.
 470          */
 471         if (req) {
 472                 musb->ackpend = csr;
 473                 musb_g_ep0_giveback(musb, req);
 474                 if (!musb->ackpend)
 475                         return;
 476                 musb->ackpend = 0;
 477         }
 478         musb_ep_select(musb->mregs, 0);
 479         musb_writew(regs, MUSB_CSR0, csr);
 480 }
 481
 482 /*
 483  * transmitting to the host (IN), this code might be called from IRQ
 484  * and from kernel thread.
 485  *
 486  * Context:  caller holds controller lock
 487  */
 488 static void ep0_txstate(struct musb *musb)
 489 {
 490         void __iomem            *regs = musb->control_ep->regs;
 491         struct usb_request      *request = next_ep0_request(musb);
 492         u16                     csr = MUSB_CSR0_TXPKTRDY;
 493         u8                      *fifo_src;
 494         u8                      fifo_count;
 495
 496         if (!request) {
 497                 /* WARN_ON(1); */
 498                 DBG(2, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0));
 499                 return;
 500         }
 501
 502         /* load the data */
 503         fifo_src = (u8 *) request->buf + request->actual;
 504         fifo_count = min((unsigned) MUSB_EP0_FIFOSIZE,
 505                 request->length - request->actual);
 506         musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src);
 507         request->actual += fifo_count;
 508
 509         /* update the flags */
 510         if (fifo_count < MUSB_MAX_END0_PACKET
 511                         || request->actual == request->length) {
 512                 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
 513                 csr |= MUSB_CSR0_P_DATAEND;
 514         } else
 515                 request = NULL;
 516
 517         /* report completions as soon as the fifo's loaded; there's no
 518          * win in waiting till this last packet gets acked.  (other than
 519          * very precise fault reporting, needed by USB TMC; possible with
 520          * this hardware, but not usable from portable gadget drivers.)
 521          */
 522         if (request) {
 523                 musb->ackpend = csr;
 524                 musb_g_ep0_giveback(musb, request);
 525                 if (!musb->ackpend)
 526                         return;
 527                 musb->ackpend = 0;
 528         }
 529
 530         /* send it out, triggering a "txpktrdy cleared" irq */
 531         musb_ep_select(musb->mregs, 0);
 532         musb_writew(regs, MUSB_CSR0, csr);
 533 }
 534
 535 /*
 536  * Read a SETUP packet (struct usb_ctrlrequest) from the hardware.
 537  * Fields are left in USB byte-order.
 538  *
 539  * Context:  caller holds controller lock.
 540  */
 541 static void
 542 musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req)
 543 {
 544         struct usb_request      *r;
 545         void __iomem            *regs = musb->control_ep->regs;
 546
 547         musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req);
 548
 549         /* NOTE:  earlier 2.6 versions changed setup packets to host
 550          * order, but now USB packets always stay in USB byte order.
 551          */
 552         DBG(3, "SETUP req%02x.%02x v%04x i%04x l%d\n",
 553                 req->bRequestType,
 554                 req->bRequest,
 555                 le16_to_cpu(req->wValue),
 556                 le16_to_cpu(req->wIndex),
 557                 le16_to_cpu(req->wLength));
 558
 559         /* clean up any leftover transfers */
 560         r = next_ep0_request(musb);
 561         if (r)
 562                 musb_g_ep0_giveback(musb, r);
 563
 564         /* For zero-data requests we want to delay the STATUS stage to
 565          * avoid SETUPEND errors.  If we read data (OUT), delay accepting
 566          * packets until there's a buffer to store them in.
 567          *
 568          * If we write data, the controller acts happier if we enable
 569          * the TX FIFO right away, and give the controller a moment
 570          * to switch modes...
 571          */
 572         musb->set_address = false;
 573         musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY;
 574         if (req->wLength == 0) {
 575                 if (req->bRequestType & USB_DIR_IN)
 576                         musb->ackpend |= MUSB_CSR0_TXPKTRDY;
 577                 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT;
 578         } else if (req->bRequestType & USB_DIR_IN) {
 579                 musb->ep0_state = MUSB_EP0_STAGE_TX;
 580                 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDRXPKTRDY);
 581                 while ((musb_readw(regs, MUSB_CSR0)
 582                                 & MUSB_CSR0_RXPKTRDY) != 0)
 583                         cpu_relax();
 584                 musb->ackpend = 0;
 585         } else
 586                 musb->ep0_state = MUSB_EP0_STAGE_RX;
 587 }
 588
 589 static int
 590 forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
 591 __releases(musb->lock)
 592 __acquires(musb->lock)
 593 {
 594         int retval;
 595         if (!musb->gadget_driver)
 596                 return -EOPNOTSUPP;
 597         spin_unlock(&musb->lock);
 598         retval = musb->gadget_driver->setup(&musb->g, ctrlrequest);
 599         spin_lock(&musb->lock);
 600         return retval;
 601 }
 602
 603 /*
 604  * Handle peripheral ep0 interrupt
 605  *
 606  * Context: irq handler; we won't re-enter the driver that way.
 607  */
 608 irqreturn_t musb_g_ep0_irq(struct musb *musb)
 609 {
 610         u16             csr;
 611         u16             len;
 612         void __iomem    *mbase = musb->mregs;
 613         void __iomem    *regs = musb->endpoints[0].regs;
 614         irqreturn_t     retval = IRQ_NONE;
 615
 616         musb_ep_select(mbase, 0);       /* select ep0 */
 617         csr = musb_readw(regs, MUSB_CSR0);
 618         len = musb_readb(regs, MUSB_COUNT0);
 619
 620         DBG(4, "csr %04x, count %d, myaddr %d, ep0stage %s\n",
 621                         csr, len,
 622                         musb_readb(mbase, MUSB_FADDR),
 623                         decode_ep0stage(musb->ep0_state));
 624
 625         /* I sent a stall.. need to acknowledge it now.. */
 626         if (csr & MUSB_CSR0_P_SENTSTALL) {
 627                 musb_writew(regs, MUSB_CSR0,
 628                                 csr & ~MUSB_CSR0_P_SENTSTALL);
 629                 retval = IRQ_HANDLED;
 630                 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 631                 csr = musb_readw(regs, MUSB_CSR0);
 632         }
 633
 634         /* request ended "early" */
 635         if (csr & MUSB_CSR0_P_SETUPEND) {
 636                 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDSETUPEND);
 637                 retval = IRQ_HANDLED;
 638                 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 639                 csr = musb_readw(regs, MUSB_CSR0);
 640                 /* NOTE:  request may need completion */
 641         }
 642
 643         /* docs from Mentor only describe tx, rx, and idle/setup states.
 644          * we need to handle nuances around status stages, and also the
 645          * case where status and setup stages come back-to-back ...
 646          */
 647         switch (musb->ep0_state) {
 648
 649         case MUSB_EP0_STAGE_TX:
 650                 /* irq on clearing txpktrdy */
 651                 if ((csr & MUSB_CSR0_TXPKTRDY) == 0) {
 652                         ep0_txstate(musb);
 653                         retval = IRQ_HANDLED;
 654                 }
 655                 break;
 656
 657         case MUSB_EP0_STAGE_RX:
 658                 /* irq on set rxpktrdy */
 659                 if (csr & MUSB_CSR0_RXPKTRDY) {
 660                         ep0_rxstate(musb);
 661                         retval = IRQ_HANDLED;
 662                 }
 663                 break;
 664
 665         case MUSB_EP0_STAGE_STATUSIN:
 666                 /* end of sequence #2 (OUT/RX state) or #3 (no data) */
 667
 668                 /* update address (if needed) only @ the end of the
 669                  * status phase per usb spec, which also guarantees
 670                  * we get 10 msec to receive this irq... until this
 671                  * is done we won't see the next packet.
 672                  */
 673                 if (musb->set_address) {
 674                         musb->set_address = false;
 675                         musb_writeb(mbase, MUSB_FADDR, musb->address);
 676                 }
 677
 678                 /* enter test mode if needed (exit by reset) */
 679                 else if (musb->test_mode) {
 680                         DBG(1, "entering TESTMODE\n");
 681
 682                         if (MUSB_TEST_PACKET == musb->test_mode_nr)
 683                                 musb_load_testpacket(musb);
 684
 685                         musb_writeb(mbase, MUSB_TESTMODE,
 686                                         musb->test_mode_nr);
 687                 }
 688                 /* FALLTHROUGH */
 689
 690         case MUSB_EP0_STAGE_STATUSOUT:
 691                 /* end of sequence #1: write to host (TX state) */
 692                 {
 693                         struct usb_request      *req;
 694
 695                         req = next_ep0_request(musb);
 696                         if (req)
 697                                 musb_g_ep0_giveback(musb, req);
 698                 }
 699                 retval = IRQ_HANDLED;
 700                 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 701                 /* FALLTHROUGH */
 702
 703         case MUSB_EP0_STAGE_SETUP:
 704                 if (csr & MUSB_CSR0_RXPKTRDY) {
 705                         struct usb_ctrlrequest  setup;
 706                         int                     handled = 0;
 707
 708                         if (len != 8) {
 709                                 ERR("SETUP packet len %d != 8 ?\n", len);
 710                                 break;
 711                         }
 712                         musb_read_setup(musb, &setup);
 713                         retval = IRQ_HANDLED;
 714
 715                         /* sometimes the RESET won't be reported */
 716                         if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) {
 717                                 u8      power;
 718
 719                                 printk(KERN_NOTICE "%s: peripheral reset "
 720                                                 "irq lost!\n",
 721                                                 musb_driver_name);
 722                                 power = musb_readb(mbase, MUSB_POWER);
 723                                 musb->g.speed = (power & MUSB_POWER_HSMODE)
 724                                         ? USB_SPEED_HIGH : USB_SPEED_FULL;
 725
 726                         }
 727
 728                         switch (musb->ep0_state) {
 729
 730                         /* sequence #3 (no data stage), includes requests
 731                          * we can't forward (notably SET_ADDRESS and the
 732                          * device/endpoint feature set/clear operations)
 733                          * plus SET_CONFIGURATION and others we must
 734                          */
 735                         case MUSB_EP0_STAGE_ACKWAIT:
 736                                 handled = service_zero_data_request(
 737                                                 musb, &setup);
 738
 739                                 /* status stage might be immediate */
 740                                 if (handled > 0) {
 741                                         musb->ackpend |= MUSB_CSR0_P_DATAEND;
 742                                         musb->ep0_state =
 743                                                 MUSB_EP0_STAGE_STATUSIN;
 744                                 }
 745                                 break;
 746
 747                         /* sequence #1 (IN to host), includes GET_STATUS
 748                          * requests that we can't forward, GET_DESCRIPTOR
 749                          * and others that we must
 750                          */
 751                         case MUSB_EP0_STAGE_TX:
 752                                 handled = service_in_request(musb, &setup);
 753                                 if (handled > 0) {
 754                                         musb->ackpend = MUSB_CSR0_TXPKTRDY
 755                                                 | MUSB_CSR0_P_DATAEND;
 756                                         musb->ep0_state =
 757                                                 MUSB_EP0_STAGE_STATUSOUT;
 758                                 }
 759                                 break;
 760
 761                         /* sequence #2 (OUT from host), always forward */
 762                         default:                /* MUSB_EP0_STAGE_RX */
 763                                 break;
 764                         }
 765
 766                         DBG(3, "handled %d, csr %04x, ep0stage %s\n",
 767                                 handled, csr,
 768                                 decode_ep0stage(musb->ep0_state));
 769
 770                         /* unless we need to delegate this to the gadget
 771                          * driver, we know how to wrap this up:  csr0 has
 772                          * not yet been written.
 773                          */
 774                         if (handled < 0)
 775                                 goto stall;
 776                         else if (handled > 0)
 777                                 goto finish;
 778
 779                         handled = forward_to_driver(musb, &setup);
 780                         if (handled < 0) {
 781                                 musb_ep_select(mbase, 0);
 782 stall:
 783                                 DBG(3, "stall (%d)\n", handled);
 784                                 musb->ackpend |= MUSB_CSR0_P_SENDSTALL;
 785                                 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 786 finish:
 787                                 musb_writew(regs, MUSB_CSR0,
 788                                                 musb->ackpend);
 789                                 musb->ackpend = 0;
 790                         }
 791                 }
 792                 break;
 793
 794         case MUSB_EP0_STAGE_ACKWAIT:
 795                 /* This should not happen. But happens with tusb6010 with
 796                  * g_file_storage and high speed. Do nothing.
 797                  */
 798                 retval = IRQ_HANDLED;
 799                 break;
 800
 801         default:
 802                 /* "can't happen" */
 803                 WARN_ON(1);
 804                 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SENDSTALL);
 805                 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 806                 break;
 807         }
 808
 809         return retval;
 810 }
 811
 812
 813 static int
 814 musb_g_ep0_enable(struct usb_ep *ep, const struct usb_endpoint_descriptor *desc)
 815 {
 816         /* always enabled */
 817         return -EINVAL;
 818 }
 819
 820 static int musb_g_ep0_disable(struct usb_ep *e)
 821 {
 822         /* always enabled */
 823         return -EINVAL;
 824 }
 825
 826 static int
 827 musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)
 828 {
 829         struct musb_ep          *ep;
 830         struct musb_request     *req;
 831         struct musb             *musb;
 832         int                     status;
 833         unsigned long           lockflags;
 834         void __iomem            *regs;
 835
 836         if (!e || !r)
 837                 return -EINVAL;
 838
 839         ep = to_musb_ep(e);
 840         musb = ep->musb;
 841         regs = musb->control_ep->regs;
 842
 843         req = to_musb_request(r);
 844         req->musb = musb;
 845         req->request.actual = 0;
 846         req->request.status = -EINPROGRESS;
 847         req->tx = ep->is_in;
 848
 849         spin_lock_irqsave(&musb->lock, lockflags);
 850
 851         if (!list_empty(&ep->req_list)) {
 852                 status = -EBUSY;
 853                 goto cleanup;
 854         }
 855
 856         switch (musb->ep0_state) {
 857         case MUSB_EP0_STAGE_RX:         /* control-OUT data */
 858         case MUSB_EP0_STAGE_TX:         /* control-IN data */
 859         case MUSB_EP0_STAGE_ACKWAIT:    /* zero-length data */
 860                 status = 0;
 861                 break;
 862         default:
 863                 DBG(1, "ep0 request queued in state %d\n",
 864                                 musb->ep0_state);
 865                 status = -EINVAL;
 866                 goto cleanup;
 867         }
 868
 869         /* add request to the list */
 870         list_add_tail(&(req->request.list), &(ep->req_list));
 871
 872         DBG(3, "queue to %s (%s), length=%d\n",
 873                         ep->name, ep->is_in ? "IN/TX" : "OUT/RX",
 874                         req->request.length);
 875
 876         musb_ep_select(musb->mregs, 0);
 877
 878         /* sequence #1, IN ... start writing the data */
 879         if (musb->ep0_state == MUSB_EP0_STAGE_TX)
 880                 ep0_txstate(musb);
 881
 882         /* sequence #3, no-data ... issue IN status */
 883         else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) {
 884                 if (req->request.length)
 885                         status = -EINVAL;
 886                 else {
 887                         musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
 888                         musb_writew(regs, MUSB_CSR0,
 889                                         musb->ackpend | MUSB_CSR0_P_DATAEND);
 890                         musb->ackpend = 0;
 891                         musb_g_ep0_giveback(ep->musb, r);
 892                 }
 893
 894         /* else for sequence #2 (OUT), caller provides a buffer
 895          * before the next packet arrives.  deferred responses
 896          * (after SETUP is acked) are racey.
 897          */
 898         } else if (musb->ackpend) {
 899                 musb_writew(regs, MUSB_CSR0, musb->ackpend);
 900                 musb->ackpend = 0;
 901         }
 902
 903 cleanup:
 904         spin_unlock_irqrestore(&musb->lock, lockflags);
 905         return status;
 906 }
 907
 908 static int musb_g_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
 909 {
 910         /* we just won't support this */
 911         return -EINVAL;
 912 }
 913
 914 static int musb_g_ep0_halt(struct usb_ep *e, int value)
 915 {
 916         struct musb_ep          *ep;
 917         struct musb             *musb;
 918         void __iomem            *base, *regs;
 919         unsigned long           flags;
 920         int                     status;
 921         u16                     csr;
 922
 923         if (!e || !value)
 924                 return -EINVAL;
 925
 926         ep = to_musb_ep(e);
 927         musb = ep->musb;
 928         base = musb->mregs;
 929         regs = musb->control_ep->regs;
 930         status = 0;
 931
 932         spin_lock_irqsave(&musb->lock, flags);
 933
 934         if (!list_empty(&ep->req_list)) {
 935                 status = -EBUSY;
 936                 goto cleanup;
 937         }
 938
 939         musb_ep_select(base, 0);
 940         csr = musb->ackpend;
 941
 942         switch (musb->ep0_state) {
 943
 944         /* Stalls are usually issued after parsing SETUP packet, either
 945          * directly in irq context from setup() or else later.
 946          */
 947         case MUSB_EP0_STAGE_TX:         /* control-IN data */
 948         case MUSB_EP0_STAGE_ACKWAIT:    /* STALL for zero-length data */
 949         case MUSB_EP0_STAGE_RX:         /* control-OUT data */
 950                 csr = musb_readw(regs, MUSB_CSR0);
 951                 /* FALLTHROUGH */
 952
 953         /* It's also OK to issue stalls during callbacks when a non-empty
 954          * DATA stage buffer has been read (or even written).
 955          */
 956         case MUSB_EP0_STAGE_STATUSIN:   /* control-OUT status */
 957         case MUSB_EP0_STAGE_STATUSOUT:  /* control-IN status */
 958
 959                 csr |= MUSB_CSR0_P_SENDSTALL;
 960                 musb_writew(regs, MUSB_CSR0, csr);
 961                 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
 962                 musb->ackpend = 0;
 963                 break;
 964         default:
 965                 DBG(1, "ep0 can't halt in state %d\n", musb->ep0_state);
 966                 status = -EINVAL;
 967         }
 968
 969 cleanup:
 970         spin_unlock_irqrestore(&musb->lock, flags);
 971         return status;
 972 }
 973
 974 const struct usb_ep_ops musb_g_ep0_ops = {
 975         .enable         = musb_g_ep0_enable,
 976         .disable        = musb_g_ep0_disable,
 977         .alloc_request  = musb_alloc_request,
 978         .free_request   = musb_free_request,
 979         .queue          = musb_g_ep0_queue,
 980         .dequeue        = musb_g_ep0_dequeue,
 981         .set_halt       = musb_g_ep0_halt,
 982 };