2 * PowerPC emulation helpers for qemu.
4 * Copyright (c) 2003-2007 Jocelyn Mayer
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include "op_helper.h"
24 #define MEMSUFFIX _raw
25 #include "op_helper.h"
26 #include "op_helper_mem.h"
27 #if !defined(CONFIG_USER_ONLY)
28 #define MEMSUFFIX _user
29 #include "op_helper.h"
30 #include "op_helper_mem.h"
31 #define MEMSUFFIX _kernel
32 #include "op_helper.h"
33 #include "op_helper_mem.h"
37 //#define DEBUG_EXCEPTIONS
38 //#define DEBUG_SOFTWARE_TLB
39 //#define FLUSH_ALL_TLBS
41 /*****************************************************************************/
42 /* Exceptions processing helpers */
43 void cpu_loop_exit (void)
45 longjmp(env->jmp_env, 1);
48 void do_raise_exception_err (uint32_t exception, int error_code)
51 printf("Raise exception %3x code : %d\n", exception, error_code);
55 if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0)
61 env->exception_index = exception;
62 env->error_code = error_code;
66 void do_raise_exception (uint32_t exception)
68 do_raise_exception_err(exception, 0);
71 void cpu_dump_EA (target_ulong EA);
72 void do_print_mem_EA (target_ulong EA)
77 /*****************************************************************************/
78 /* Registers load and stores */
79 void do_load_cr (void)
81 T0 = (env->crf[0] << 28) |
91 void do_store_cr (uint32_t mask)
95 for (i = 0, sh = 7; i < 8; i++, sh --) {
97 env->crf[i] = (T0 >> (sh * 4)) & 0xFUL;
101 void do_load_xer (void)
103 T0 = (xer_so << XER_SO) |
107 (xer_cmp << XER_CMP);
110 void do_store_xer (void)
112 xer_so = (T0 >> XER_SO) & 0x01;
113 xer_ov = (T0 >> XER_OV) & 0x01;
114 xer_ca = (T0 >> XER_CA) & 0x01;
115 xer_cmp = (T0 >> XER_CMP) & 0xFF;
116 xer_bc = (T0 >> XER_BC) & 0x7F;
119 void do_load_fpscr (void)
121 /* The 32 MSB of the target fpr are undefined.
132 #if defined(WORDS_BIGENDIAN)
141 for (i = 0; i < 8; i++)
142 u.s.u[WORD1] |= env->fpscr[i] << (4 * i);
146 void do_store_fpscr (uint32_t mask)
149 * We use only the 32 LSB of the incoming fpr
161 env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9);
162 for (i = 1; i < 7; i++) {
163 if (mask & (1 << (7 - i)))
164 env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF;
166 /* TODO: update FEX & VX */
167 /* Set rounding mode */
168 switch (env->fpscr[0] & 0x3) {
170 /* Best approximation (round to nearest) */
171 rnd_type = float_round_nearest_even;
174 /* Smaller magnitude (round toward zero) */
175 rnd_type = float_round_to_zero;
178 /* Round toward +infinite */
179 rnd_type = float_round_up;
183 /* Round toward -infinite */
184 rnd_type = float_round_down;
187 set_float_rounding_mode(rnd_type, &env->fp_status);
190 target_ulong ppc_load_dump_spr (int sprn)
193 fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n",
194 sprn, sprn, env->spr[sprn]);
197 return env->spr[sprn];
200 void ppc_store_dump_spr (int sprn, target_ulong val)
203 fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n",
204 sprn, sprn, env->spr[sprn], val);
206 env->spr[sprn] = val;
209 /*****************************************************************************/
210 /* Fixed point operations helpers */
211 #if defined(TARGET_PPC64)
212 static void add128 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
221 static void neg128 (uint64_t *plow, uint64_t *phigh)
225 add128(plow, phigh, 1, 0);
228 static void mul64 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b)
230 uint32_t a0, a1, b0, b1;
239 v = (uint64_t)a0 * (uint64_t)b0;
243 v = (uint64_t)a0 * (uint64_t)b1;
244 add128(plow, phigh, v << 32, v >> 32);
246 v = (uint64_t)a1 * (uint64_t)b0;
247 add128(plow, phigh, v << 32, v >> 32);
249 v = (uint64_t)a1 * (uint64_t)b1;
251 #if defined(DEBUG_MULDIV)
252 printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n",
253 a, b, *phigh, *plow);
257 void do_mul64 (uint64_t *plow, uint64_t *phigh)
259 mul64(plow, phigh, T0, T1);
262 static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b)
271 mul64(plow, phigh, a, b);
277 void do_imul64 (uint64_t *plow, uint64_t *phigh)
279 imul64(plow, phigh, T0, T1);
287 if (likely(!((uint32_t)T0 < (uint32_t)T2 ||
288 (xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {
295 #if defined(TARGET_PPC64)
296 void do_adde_64 (void)
300 if (likely(!((uint64_t)T0 < (uint64_t)T2 ||
301 (xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {
309 void do_addmeo (void)
313 if (likely(!((uint32_t)T1 &
314 ((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) {
324 #if defined(TARGET_PPC64)
325 void do_addmeo_64 (void)
329 if (likely(!((uint64_t)T1 &
330 ((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) {
343 if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) ||
344 (int32_t)T1 == 0))) {
346 T0 = (int32_t)T0 / (int32_t)T1;
350 T0 = (-1) * ((uint32_t)T0 >> 31);
354 #if defined(TARGET_PPC64)
357 if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) ||
358 (int64_t)T1 == 0))) {
360 T0 = (int64_t)T0 / (int64_t)T1;
364 T0 = (-1ULL) * ((uint64_t)T0 >> 63);
369 void do_divwuo (void)
371 if (likely((uint32_t)T1 != 0)) {
373 T0 = (uint32_t)T0 / (uint32_t)T1;
381 #if defined(TARGET_PPC64)
382 void do_divduo (void)
384 if (likely((uint64_t)T1 != 0)) {
386 T0 = (uint64_t)T0 / (uint64_t)T1;
395 void do_mullwo (void)
397 int64_t res = (int64_t)T0 * (int64_t)T1;
399 if (likely((int32_t)res == res)) {
408 #if defined(TARGET_PPC64)
409 void do_mulldo (void)
415 if (likely(th == 0)) {
427 if (likely((int32_t)T0 != INT32_MIN)) {
436 #if defined(TARGET_PPC64)
437 void do_nego_64 (void)
439 if (likely((int64_t)T0 != INT64_MIN)) {
451 T0 = T1 + ~T0 + xer_ca;
452 if (likely((uint32_t)T0 >= (uint32_t)T1 &&
453 (xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {
460 #if defined(TARGET_PPC64)
461 void do_subfe_64 (void)
463 T0 = T1 + ~T0 + xer_ca;
464 if (likely((uint64_t)T0 >= (uint64_t)T1 &&
465 (xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {
473 void do_subfmeo (void)
476 T0 = ~T0 + xer_ca - 1;
477 if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) &
484 if (likely((uint32_t)T1 != UINT32_MAX))
488 #if defined(TARGET_PPC64)
489 void do_subfmeo_64 (void)
492 T0 = ~T0 + xer_ca - 1;
493 if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) &
500 if (likely((uint64_t)T1 != UINT64_MAX))
505 void do_subfzeo (void)
509 if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) &
510 ((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) {
516 if (likely((uint32_t)T0 >= (uint32_t)~T1)) {
523 #if defined(TARGET_PPC64)
524 void do_subfzeo_64 (void)
528 if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) &
529 ((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) {
535 if (likely((uint64_t)T0 >= (uint64_t)~T1)) {
543 /* shift right arithmetic helper */
548 if (likely(!(T1 & 0x20UL))) {
549 if (likely((uint32_t)T1 != 0)) {
550 ret = (int32_t)T0 >> (T1 & 0x1fUL);
551 if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) {
561 ret = (-1) * ((uint32_t)T0 >> 31);
562 if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) {
571 #if defined(TARGET_PPC64)
576 if (likely(!(T1 & 0x40UL))) {
577 if (likely((uint64_t)T1 != 0)) {
578 ret = (int64_t)T0 >> (T1 & 0x3FUL);
579 if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) {
589 ret = (-1) * ((uint64_t)T0 >> 63);
590 if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) {
600 static inline int popcnt (uint32_t val)
604 for (i = 0; val != 0;)
605 val = val ^ (val - 1);
610 void do_popcntb (void)
616 for (i = 0; i < 32; i += 8)
617 ret |= popcnt((T0 >> i) & 0xFF) << i;
621 #if defined(TARGET_PPC64)
622 void do_popcntb_64 (void)
628 for (i = 0; i < 64; i += 8)
629 ret |= popcnt((T0 >> i) & 0xFF) << i;
634 /*****************************************************************************/
635 /* Floating point operations helpers */
643 p.i = float64_to_int32(FT0, &env->fp_status);
644 #if USE_PRECISE_EMULATION
645 /* XXX: higher bits are not supposed to be significant.
646 * to make tests easier, return the same as a real PowerPC 750 (aka G3)
648 p.i |= 0xFFF80000ULL << 32;
653 void do_fctiwz (void)
660 p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status);
661 #if USE_PRECISE_EMULATION
662 /* XXX: higher bits are not supposed to be significant.
663 * to make tests easier, return the same as a real PowerPC 750 (aka G3)
665 p.i |= 0xFFF80000ULL << 32;
670 #if defined(TARGET_PPC64)
679 FT0 = int64_to_float64(p.i, &env->fp_status);
689 p.i = float64_to_int64(FT0, &env->fp_status);
693 void do_fctidz (void)
700 p.i = float64_to_int64_round_to_zero(FT0, &env->fp_status);
706 #if USE_PRECISE_EMULATION
710 float128 ft0_128, ft1_128;
712 ft0_128 = float64_to_float128(FT0, &env->fp_status);
713 ft1_128 = float64_to_float128(FT1, &env->fp_status);
714 ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
715 ft1_128 = float64_to_float128(FT2, &env->fp_status);
716 ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
717 FT0 = float128_to_float64(ft0_128, &env->fp_status);
719 /* This is OK on x86 hosts */
720 FT0 = (FT0 * FT1) + FT2;
727 float128 ft0_128, ft1_128;
729 ft0_128 = float64_to_float128(FT0, &env->fp_status);
730 ft1_128 = float64_to_float128(FT1, &env->fp_status);
731 ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
732 ft1_128 = float64_to_float128(FT2, &env->fp_status);
733 ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
734 FT0 = float128_to_float64(ft0_128, &env->fp_status);
736 /* This is OK on x86 hosts */
737 FT0 = (FT0 * FT1) - FT2;
740 #endif /* USE_PRECISE_EMULATION */
742 void do_fnmadd (void)
744 #if USE_PRECISE_EMULATION
746 float128 ft0_128, ft1_128;
748 ft0_128 = float64_to_float128(FT0, &env->fp_status);
749 ft1_128 = float64_to_float128(FT1, &env->fp_status);
750 ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
751 ft1_128 = float64_to_float128(FT2, &env->fp_status);
752 ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status);
753 FT0 = float128_to_float64(ft0_128, &env->fp_status);
755 /* This is OK on x86 hosts */
756 FT0 = (FT0 * FT1) + FT2;
759 FT0 = float64_mul(FT0, FT1, &env->fp_status);
760 FT0 = float64_add(FT0, FT2, &env->fp_status);
762 if (likely(!isnan(FT0)))
763 FT0 = float64_chs(FT0);
766 void do_fnmsub (void)
768 #if USE_PRECISE_EMULATION
770 float128 ft0_128, ft1_128;
772 ft0_128 = float64_to_float128(FT0, &env->fp_status);
773 ft1_128 = float64_to_float128(FT1, &env->fp_status);
774 ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status);
775 ft1_128 = float64_to_float128(FT2, &env->fp_status);
776 ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status);
777 FT0 = float128_to_float64(ft0_128, &env->fp_status);
779 /* This is OK on x86 hosts */
780 FT0 = (FT0 * FT1) - FT2;
783 FT0 = float64_mul(FT0, FT1, &env->fp_status);
784 FT0 = float64_sub(FT0, FT2, &env->fp_status);
786 if (likely(!isnan(FT0)))
787 FT0 = float64_chs(FT0);
792 FT0 = float64_sqrt(FT0, &env->fp_status);
802 if (likely(isnormal(FT0))) {
803 #if USE_PRECISE_EMULATION
804 FT0 = float64_div(1.0, FT0, &env->fp_status);
805 FT0 = float64_to_float32(FT0, &env->fp_status);
807 FT0 = float32_div(1.0, FT0, &env->fp_status);
811 if (p.i == 0x8000000000000000ULL) {
812 p.i = 0xFFF0000000000000ULL;
813 } else if (p.i == 0x0000000000000000ULL) {
814 p.i = 0x7FF0000000000000ULL;
815 } else if (isnan(FT0)) {
816 p.i = 0x7FF8000000000000ULL;
817 } else if (FT0 < 0.0) {
818 p.i = 0x8000000000000000ULL;
820 p.i = 0x0000000000000000ULL;
826 void do_frsqrte (void)
833 if (likely(isnormal(FT0) && FT0 > 0.0)) {
834 FT0 = float64_sqrt(FT0, &env->fp_status);
835 FT0 = float32_div(1.0, FT0, &env->fp_status);
838 if (p.i == 0x8000000000000000ULL) {
839 p.i = 0xFFF0000000000000ULL;
840 } else if (p.i == 0x0000000000000000ULL) {
841 p.i = 0x7FF0000000000000ULL;
842 } else if (isnan(FT0)) {
843 if (!(p.i & 0x0008000000000000ULL))
844 p.i |= 0x000FFFFFFFFFFFFFULL;
845 } else if (FT0 < 0) {
846 p.i = 0x7FF8000000000000ULL;
848 p.i = 0x0000000000000000ULL;
864 if (likely(!isnan(FT0) && !isnan(FT1))) {
865 if (float64_lt(FT0, FT1, &env->fp_status)) {
867 } else if (!float64_le(FT0, FT1, &env->fp_status)) {
874 env->fpscr[4] |= 0x1;
875 env->fpscr[6] |= 0x1;
882 env->fpscr[4] &= ~0x1;
883 if (likely(!isnan(FT0) && !isnan(FT1))) {
884 if (float64_lt(FT0, FT1, &env->fp_status)) {
886 } else if (!float64_le(FT0, FT1, &env->fp_status)) {
893 env->fpscr[4] |= 0x1;
894 if (!float64_is_signaling_nan(FT0) || !float64_is_signaling_nan(FT1)) {
896 env->fpscr[6] |= 0x1;
897 if (!(env->fpscr[1] & 0x8))
898 env->fpscr[4] |= 0x8;
900 env->fpscr[4] |= 0x8;
906 #if !defined (CONFIG_USER_ONLY)
909 #if defined(TARGET_PPC64)
910 if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) {
911 env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
912 do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
914 env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
915 ppc_store_msr_32(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
918 env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
919 do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
921 #if defined (DEBUG_OP)
924 env->interrupt_request |= CPU_INTERRUPT_EXITTB;
927 #if defined(TARGET_PPC64)
930 if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) {
931 env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
932 do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
934 env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
935 do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
937 #if defined (DEBUG_OP)
940 env->interrupt_request |= CPU_INTERRUPT_EXITTB;
945 void do_tw (int flags)
947 if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) ||
948 ((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
949 ((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
950 ((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
951 ((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) {
952 do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
956 #if defined(TARGET_PPC64)
957 void do_td (int flags)
959 if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) ||
960 ((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
961 ((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
962 ((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
963 ((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
964 do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP);
968 /*****************************************************************************/
969 /* PowerPC 601 specific instructions (POWER bridge) */
970 void do_POWER_abso (void)
972 if ((uint32_t)T0 == INT32_MIN) {
982 void do_POWER_clcs (void)
986 /* Instruction cache line size */
987 T0 = ICACHE_LINE_SIZE;
990 /* Data cache line size */
991 T0 = DCACHE_LINE_SIZE;
994 /* Minimum cache line size */
995 T0 = ICACHE_LINE_SIZE < DCACHE_LINE_SIZE ?
996 ICACHE_LINE_SIZE : DCACHE_LINE_SIZE;
999 /* Maximum cache line size */
1000 T0 = ICACHE_LINE_SIZE > DCACHE_LINE_SIZE ?
1001 ICACHE_LINE_SIZE : DCACHE_LINE_SIZE;
1009 void do_POWER_div (void)
1013 if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1014 T0 = (long)((-1) * (T0 >> 31));
1015 env->spr[SPR_MQ] = 0;
1017 tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
1018 env->spr[SPR_MQ] = tmp % T1;
1019 T0 = tmp / (int32_t)T1;
1023 void do_POWER_divo (void)
1027 if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1028 T0 = (long)((-1) * (T0 >> 31));
1029 env->spr[SPR_MQ] = 0;
1033 tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
1034 env->spr[SPR_MQ] = tmp % T1;
1036 if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
1046 void do_POWER_divs (void)
1048 if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1049 T0 = (long)((-1) * (T0 >> 31));
1050 env->spr[SPR_MQ] = 0;
1052 env->spr[SPR_MQ] = T0 % T1;
1053 T0 = (int32_t)T0 / (int32_t)T1;
1057 void do_POWER_divso (void)
1059 if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1060 T0 = (long)((-1) * (T0 >> 31));
1061 env->spr[SPR_MQ] = 0;
1065 T0 = (int32_t)T0 / (int32_t)T1;
1066 env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1;
1071 void do_POWER_dozo (void)
1073 if ((int32_t)T1 > (int32_t)T0) {
1076 if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
1077 ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) {
1089 void do_POWER_maskg (void)
1093 if ((uint32_t)T0 == (uint32_t)(T1 + 1)) {
1096 ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
1097 (((uint32_t)(-1) >> ((uint32_t)T1)) >> 1);
1098 if ((uint32_t)T0 > (uint32_t)T1)
1104 void do_POWER_mulo (void)
1108 tmp = (uint64_t)T0 * (uint64_t)T1;
1109 env->spr[SPR_MQ] = tmp >> 32;
1111 if (tmp >> 32 != ((uint64_t)T0 >> 16) * ((uint64_t)T1 >> 16)) {
1119 #if !defined (CONFIG_USER_ONLY)
1120 void do_POWER_rac (void)
1125 /* We don't have to generate many instances of this instruction,
1126 * as rac is supervisor only.
1128 if (get_physical_address(env, &ctx, T0, 0, ACCESS_INT, 1) == 0)
1133 void do_POWER_rfsvc (void)
1135 env->nip = env->lr & ~0x00000003UL;
1136 T0 = env->ctr & 0x0000FFFFUL;
1137 do_store_msr(env, T0);
1138 #if defined (DEBUG_OP)
1141 env->interrupt_request |= CPU_INTERRUPT_EXITTB;
1144 /* PowerPC 601 BAT management helper */
1145 void do_store_601_batu (int nr)
1147 do_store_ibatu(env, nr, (uint32_t)T0);
1148 env->DBAT[0][nr] = env->IBAT[0][nr];
1149 env->DBAT[1][nr] = env->IBAT[1][nr];
1153 /*****************************************************************************/
1154 /* 602 specific instructions */
1155 /* mfrom is the most crazy instruction ever seen, imho ! */
1156 /* Real implementation uses a ROM table. Do the same */
1157 #define USE_MFROM_ROM_TABLE
1158 void do_op_602_mfrom (void)
1160 if (likely(T0 < 602)) {
1161 #if defined(USE_MFROM_ROM_TABLE)
1162 #include "mfrom_table.c"
1163 T0 = mfrom_ROM_table[T0];
1166 /* Extremly decomposed:
1168 * T0 = 256 * log10(10 + 1.0) + 0.5
1171 d = float64_div(d, 256, &env->fp_status);
1173 d = exp10(d); // XXX: use float emulation function
1174 d = float64_add(d, 1.0, &env->fp_status);
1175 d = log10(d); // XXX: use float emulation function
1176 d = float64_mul(d, 256, &env->fp_status);
1177 d = float64_add(d, 0.5, &env->fp_status);
1178 T0 = float64_round_to_int(d, &env->fp_status);
1185 /*****************************************************************************/
1186 /* Embedded PowerPC specific helpers */
1187 void do_405_check_ov (void)
1189 if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) ||
1190 !(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
1198 void do_405_check_sat (void)
1200 if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) ||
1201 !(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
1202 /* Saturate result */
1211 #if !defined(CONFIG_USER_ONLY)
1212 void do_40x_rfci (void)
1214 env->nip = env->spr[SPR_40x_SRR2];
1215 do_store_msr(env, env->spr[SPR_40x_SRR3] & ~0xFFFF0000);
1216 #if defined (DEBUG_OP)
1219 env->interrupt_request = CPU_INTERRUPT_EXITTB;
1224 #if defined(TARGET_PPC64)
1225 if (env->spr[SPR_BOOKE_CSRR1] & (1 << MSR_CM)) {
1226 env->nip = (uint64_t)env->spr[SPR_BOOKE_CSRR0];
1230 env->nip = (uint32_t)env->spr[SPR_BOOKE_CSRR0];
1232 do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_CSRR1] & ~0x3FFF0000);
1233 #if defined (DEBUG_OP)
1236 env->interrupt_request = CPU_INTERRUPT_EXITTB;
1241 #if defined(TARGET_PPC64)
1242 if (env->spr[SPR_BOOKE_DSRR1] & (1 << MSR_CM)) {
1243 env->nip = (uint64_t)env->spr[SPR_BOOKE_DSRR0];
1247 env->nip = (uint32_t)env->spr[SPR_BOOKE_DSRR0];
1249 do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_DSRR1] & ~0x3FFF0000);
1250 #if defined (DEBUG_OP)
1253 env->interrupt_request = CPU_INTERRUPT_EXITTB;
1256 void do_rfmci (void)
1258 #if defined(TARGET_PPC64)
1259 if (env->spr[SPR_BOOKE_MCSRR1] & (1 << MSR_CM)) {
1260 env->nip = (uint64_t)env->spr[SPR_BOOKE_MCSRR0];
1264 env->nip = (uint32_t)env->spr[SPR_BOOKE_MCSRR0];
1266 do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_MCSRR1] & ~0x3FFF0000);
1267 #if defined (DEBUG_OP)
1270 env->interrupt_request = CPU_INTERRUPT_EXITTB;
1273 void do_load_dcr (void)
1277 if (unlikely(env->dcr_env == NULL)) {
1279 fprintf(logfile, "No DCR environment\n");
1281 do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL);
1282 } else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) {
1284 fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0);
1286 do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG);
1292 void do_store_dcr (void)
1294 if (unlikely(env->dcr_env == NULL)) {
1296 fprintf(logfile, "No DCR environment\n");
1298 do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL);
1299 } else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) {
1301 fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0);
1303 do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG);
1307 void do_load_403_pb (int num)
1312 void do_store_403_pb (int num)
1314 if (likely(env->pb[num] != T0)) {
1316 /* Should be optimized */
1323 void do_440_dlmzb (void)
1329 for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
1330 if ((T0 & mask) == 0)
1334 for (mask = 0xFF000000; mask != 0; mask = mask >> 8) {
1335 if ((T1 & mask) == 0)
1343 #if defined(TARGET_PPCSPE)
1344 /* SPE extension helpers */
1345 /* Use a table to make this quicker */
1346 static uint8_t hbrev[16] = {
1347 0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE,
1348 0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF,
1351 static inline uint8_t byte_reverse (uint8_t val)
1353 return hbrev[val >> 4] | (hbrev[val & 0xF] << 4);
1356 static inline uint32_t word_reverse (uint32_t val)
1358 return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) |
1359 (byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24);
1362 #define MASKBITS 16 // Random value - to be fixed
1363 void do_brinc (void)
1365 uint32_t a, b, d, mask;
1367 mask = (uint32_t)(-1UL) >> MASKBITS;
1370 d = word_reverse(1 + word_reverse(a | ~mask));
1371 T0_64 = (T0_64 & ~mask) | (d & mask);
1374 #define DO_SPE_OP2(name) \
1375 void do_ev##name (void) \
1377 T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \
1378 (uint64_t)_do_e##name(T0_64, T1_64); \
1381 #define DO_SPE_OP1(name) \
1382 void do_ev##name (void) \
1384 T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \
1385 (uint64_t)_do_e##name(T0_64); \
1388 /* Fixed-point vector arithmetic */
1389 static inline uint32_t _do_eabs (uint32_t val)
1391 if (val != 0x80000000)
1397 static inline uint32_t _do_eaddw (uint32_t op1, uint32_t op2)
1402 static inline int _do_ecntlsw (uint32_t val)
1404 if (val & 0x80000000)
1405 return _do_cntlzw(~val);
1407 return _do_cntlzw(val);
1410 static inline int _do_ecntlzw (uint32_t val)
1412 return _do_cntlzw(val);
1415 static inline uint32_t _do_eneg (uint32_t val)
1417 if (val != 0x80000000)
1423 static inline uint32_t _do_erlw (uint32_t op1, uint32_t op2)
1425 return rotl32(op1, op2);
1428 static inline uint32_t _do_erndw (uint32_t val)
1430 return (val + 0x000080000000) & 0xFFFF0000;
1433 static inline uint32_t _do_eslw (uint32_t op1, uint32_t op2)
1435 /* No error here: 6 bits are used */
1436 return op1 << (op2 & 0x3F);
1439 static inline int32_t _do_esrws (int32_t op1, uint32_t op2)
1441 /* No error here: 6 bits are used */
1442 return op1 >> (op2 & 0x3F);
1445 static inline uint32_t _do_esrwu (uint32_t op1, uint32_t op2)
1447 /* No error here: 6 bits are used */
1448 return op1 >> (op2 & 0x3F);
1451 static inline uint32_t _do_esubfw (uint32_t op1, uint32_t op2)
1479 /* evsel is a little bit more complicated... */
1480 static inline uint32_t _do_esel (uint32_t op1, uint32_t op2, int n)
1488 void do_evsel (void)
1490 T0_64 = ((uint64_t)_do_esel(T0_64 >> 32, T1_64 >> 32, T0 >> 3) << 32) |
1491 (uint64_t)_do_esel(T0_64, T1_64, (T0 >> 2) & 1);
1494 /* Fixed-point vector comparisons */
1495 #define DO_SPE_CMP(name) \
1496 void do_ev##name (void) \
1498 T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \
1499 T1_64 >> 32) << 32, \
1500 _do_e##name(T0_64, T1_64)); \
1503 static inline uint32_t _do_evcmp_merge (int t0, int t1)
1505 return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1);
1507 static inline int _do_ecmpeq (uint32_t op1, uint32_t op2)
1509 return op1 == op2 ? 1 : 0;
1512 static inline int _do_ecmpgts (int32_t op1, int32_t op2)
1514 return op1 > op2 ? 1 : 0;
1517 static inline int _do_ecmpgtu (uint32_t op1, uint32_t op2)
1519 return op1 > op2 ? 1 : 0;
1522 static inline int _do_ecmplts (int32_t op1, int32_t op2)
1524 return op1 < op2 ? 1 : 0;
1527 static inline int _do_ecmpltu (uint32_t op1, uint32_t op2)
1529 return op1 < op2 ? 1 : 0;
1543 /* Single precision floating-point conversions from/to integer */
1544 static inline uint32_t _do_efscfsi (int32_t val)
1551 u.f = int32_to_float32(val, &env->spe_status);
1556 static inline uint32_t _do_efscfui (uint32_t val)
1563 u.f = uint32_to_float32(val, &env->spe_status);
1568 static inline int32_t _do_efsctsi (uint32_t val)
1576 /* NaN are not treated the same way IEEE 754 does */
1577 if (unlikely(isnan(u.f)))
1580 return float32_to_int32(u.f, &env->spe_status);
1583 static inline uint32_t _do_efsctui (uint32_t val)
1591 /* NaN are not treated the same way IEEE 754 does */
1592 if (unlikely(isnan(u.f)))
1595 return float32_to_uint32(u.f, &env->spe_status);
1598 static inline int32_t _do_efsctsiz (uint32_t val)
1606 /* NaN are not treated the same way IEEE 754 does */
1607 if (unlikely(isnan(u.f)))
1610 return float32_to_int32_round_to_zero(u.f, &env->spe_status);
1613 static inline uint32_t _do_efsctuiz (uint32_t val)
1621 /* NaN are not treated the same way IEEE 754 does */
1622 if (unlikely(isnan(u.f)))
1625 return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
1628 void do_efscfsi (void)
1630 T0_64 = _do_efscfsi(T0_64);
1633 void do_efscfui (void)
1635 T0_64 = _do_efscfui(T0_64);
1638 void do_efsctsi (void)
1640 T0_64 = _do_efsctsi(T0_64);
1643 void do_efsctui (void)
1645 T0_64 = _do_efsctui(T0_64);
1648 void do_efsctsiz (void)
1650 T0_64 = _do_efsctsiz(T0_64);
1653 void do_efsctuiz (void)
1655 T0_64 = _do_efsctuiz(T0_64);
1658 /* Single precision floating-point conversion to/from fractional */
1659 static inline uint32_t _do_efscfsf (uint32_t val)
1667 u.f = int32_to_float32(val, &env->spe_status);
1668 tmp = int64_to_float32(1ULL << 32, &env->spe_status);
1669 u.f = float32_div(u.f, tmp, &env->spe_status);
1674 static inline uint32_t _do_efscfuf (uint32_t val)
1682 u.f = uint32_to_float32(val, &env->spe_status);
1683 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
1684 u.f = float32_div(u.f, tmp, &env->spe_status);
1689 static inline int32_t _do_efsctsf (uint32_t val)
1698 /* NaN are not treated the same way IEEE 754 does */
1699 if (unlikely(isnan(u.f)))
1701 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
1702 u.f = float32_mul(u.f, tmp, &env->spe_status);
1704 return float32_to_int32(u.f, &env->spe_status);
1707 static inline uint32_t _do_efsctuf (uint32_t val)
1716 /* NaN are not treated the same way IEEE 754 does */
1717 if (unlikely(isnan(u.f)))
1719 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
1720 u.f = float32_mul(u.f, tmp, &env->spe_status);
1722 return float32_to_uint32(u.f, &env->spe_status);
1725 static inline int32_t _do_efsctsfz (uint32_t val)
1734 /* NaN are not treated the same way IEEE 754 does */
1735 if (unlikely(isnan(u.f)))
1737 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
1738 u.f = float32_mul(u.f, tmp, &env->spe_status);
1740 return float32_to_int32_round_to_zero(u.f, &env->spe_status);
1743 static inline uint32_t _do_efsctufz (uint32_t val)
1752 /* NaN are not treated the same way IEEE 754 does */
1753 if (unlikely(isnan(u.f)))
1755 tmp = uint64_to_float32(1ULL << 32, &env->spe_status);
1756 u.f = float32_mul(u.f, tmp, &env->spe_status);
1758 return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
1761 void do_efscfsf (void)
1763 T0_64 = _do_efscfsf(T0_64);
1766 void do_efscfuf (void)
1768 T0_64 = _do_efscfuf(T0_64);
1771 void do_efsctsf (void)
1773 T0_64 = _do_efsctsf(T0_64);
1776 void do_efsctuf (void)
1778 T0_64 = _do_efsctuf(T0_64);
1781 void do_efsctsfz (void)
1783 T0_64 = _do_efsctsfz(T0_64);
1786 void do_efsctufz (void)
1788 T0_64 = _do_efsctufz(T0_64);
1791 /* Double precision floating point helpers */
1792 static inline int _do_efdcmplt (uint64_t op1, uint64_t op2)
1794 /* XXX: TODO: test special values (NaN, infinites, ...) */
1795 return _do_efdtstlt(op1, op2);
1798 static inline int _do_efdcmpgt (uint64_t op1, uint64_t op2)
1800 /* XXX: TODO: test special values (NaN, infinites, ...) */
1801 return _do_efdtstgt(op1, op2);
1804 static inline int _do_efdcmpeq (uint64_t op1, uint64_t op2)
1806 /* XXX: TODO: test special values (NaN, infinites, ...) */
1807 return _do_efdtsteq(op1, op2);
1810 void do_efdcmplt (void)
1812 T0 = _do_efdcmplt(T0_64, T1_64);
1815 void do_efdcmpgt (void)
1817 T0 = _do_efdcmpgt(T0_64, T1_64);
1820 void do_efdcmpeq (void)
1822 T0 = _do_efdcmpeq(T0_64, T1_64);
1825 /* Double precision floating-point conversion to/from integer */
1826 static inline uint64_t _do_efdcfsi (int64_t val)
1833 u.f = int64_to_float64(val, &env->spe_status);
1838 static inline uint64_t _do_efdcfui (uint64_t val)
1845 u.f = uint64_to_float64(val, &env->spe_status);
1850 static inline int64_t _do_efdctsi (uint64_t val)
1858 /* NaN are not treated the same way IEEE 754 does */
1859 if (unlikely(isnan(u.f)))
1862 return float64_to_int64(u.f, &env->spe_status);
1865 static inline uint64_t _do_efdctui (uint64_t val)
1873 /* NaN are not treated the same way IEEE 754 does */
1874 if (unlikely(isnan(u.f)))
1877 return float64_to_uint64(u.f, &env->spe_status);
1880 static inline int64_t _do_efdctsiz (uint64_t val)
1888 /* NaN are not treated the same way IEEE 754 does */
1889 if (unlikely(isnan(u.f)))
1892 return float64_to_int64_round_to_zero(u.f, &env->spe_status);
1895 static inline uint64_t _do_efdctuiz (uint64_t val)
1903 /* NaN are not treated the same way IEEE 754 does */
1904 if (unlikely(isnan(u.f)))
1907 return float64_to_uint64_round_to_zero(u.f, &env->spe_status);
1910 void do_efdcfsi (void)
1912 T0_64 = _do_efdcfsi(T0_64);
1915 void do_efdcfui (void)
1917 T0_64 = _do_efdcfui(T0_64);
1920 void do_efdctsi (void)
1922 T0_64 = _do_efdctsi(T0_64);
1925 void do_efdctui (void)
1927 T0_64 = _do_efdctui(T0_64);
1930 void do_efdctsiz (void)
1932 T0_64 = _do_efdctsiz(T0_64);
1935 void do_efdctuiz (void)
1937 T0_64 = _do_efdctuiz(T0_64);
1940 /* Double precision floating-point conversion to/from fractional */
1941 static inline uint64_t _do_efdcfsf (int64_t val)
1949 u.f = int32_to_float64(val, &env->spe_status);
1950 tmp = int64_to_float64(1ULL << 32, &env->spe_status);
1951 u.f = float64_div(u.f, tmp, &env->spe_status);
1956 static inline uint64_t _do_efdcfuf (uint64_t val)
1964 u.f = uint32_to_float64(val, &env->spe_status);
1965 tmp = int64_to_float64(1ULL << 32, &env->spe_status);
1966 u.f = float64_div(u.f, tmp, &env->spe_status);
1971 static inline int64_t _do_efdctsf (uint64_t val)
1980 /* NaN are not treated the same way IEEE 754 does */
1981 if (unlikely(isnan(u.f)))
1983 tmp = uint64_to_float64(1ULL << 32, &env->spe_status);
1984 u.f = float64_mul(u.f, tmp, &env->spe_status);
1986 return float64_to_int32(u.f, &env->spe_status);
1989 static inline uint64_t _do_efdctuf (uint64_t val)
1998 /* NaN are not treated the same way IEEE 754 does */
1999 if (unlikely(isnan(u.f)))
2001 tmp = uint64_to_float64(1ULL << 32, &env->spe_status);
2002 u.f = float64_mul(u.f, tmp, &env->spe_status);
2004 return float64_to_uint32(u.f, &env->spe_status);
2007 static inline int64_t _do_efdctsfz (uint64_t val)
2016 /* NaN are not treated the same way IEEE 754 does */
2017 if (unlikely(isnan(u.f)))
2019 tmp = uint64_to_float64(1ULL << 32, &env->spe_status);
2020 u.f = float64_mul(u.f, tmp, &env->spe_status);
2022 return float64_to_int32_round_to_zero(u.f, &env->spe_status);
2025 static inline uint64_t _do_efdctufz (uint64_t val)
2034 /* NaN are not treated the same way IEEE 754 does */
2035 if (unlikely(isnan(u.f)))
2037 tmp = uint64_to_float64(1ULL << 32, &env->spe_status);
2038 u.f = float64_mul(u.f, tmp, &env->spe_status);
2040 return float64_to_uint32_round_to_zero(u.f, &env->spe_status);
2043 void do_efdcfsf (void)
2045 T0_64 = _do_efdcfsf(T0_64);
2048 void do_efdcfuf (void)
2050 T0_64 = _do_efdcfuf(T0_64);
2053 void do_efdctsf (void)
2055 T0_64 = _do_efdctsf(T0_64);
2058 void do_efdctuf (void)
2060 T0_64 = _do_efdctuf(T0_64);
2063 void do_efdctsfz (void)
2065 T0_64 = _do_efdctsfz(T0_64);
2068 void do_efdctufz (void)
2070 T0_64 = _do_efdctufz(T0_64);
2073 /* Floating point conversion between single and double precision */
2074 static inline uint32_t _do_efscfd (uint64_t val)
2086 u2.f = float64_to_float32(u1.f, &env->spe_status);
2091 static inline uint64_t _do_efdcfs (uint32_t val)
2103 u2.f = float32_to_float64(u1.f, &env->spe_status);
2108 void do_efscfd (void)
2110 T0_64 = _do_efscfd(T0_64);
2113 void do_efdcfs (void)
2115 T0_64 = _do_efdcfs(T0_64);
2118 /* Single precision fixed-point vector arithmetic */
2134 /* Single-precision floating-point comparisons */
2135 static inline int _do_efscmplt (uint32_t op1, uint32_t op2)
2137 /* XXX: TODO: test special values (NaN, infinites, ...) */
2138 return _do_efststlt(op1, op2);
2141 static inline int _do_efscmpgt (uint32_t op1, uint32_t op2)
2143 /* XXX: TODO: test special values (NaN, infinites, ...) */
2144 return _do_efststgt(op1, op2);
2147 static inline int _do_efscmpeq (uint32_t op1, uint32_t op2)
2149 /* XXX: TODO: test special values (NaN, infinites, ...) */
2150 return _do_efststeq(op1, op2);
2153 void do_efscmplt (void)
2155 T0 = _do_efscmplt(T0_64, T1_64);
2158 void do_efscmpgt (void)
2160 T0 = _do_efscmpgt(T0_64, T1_64);
2163 void do_efscmpeq (void)
2165 T0 = _do_efscmpeq(T0_64, T1_64);
2168 /* Single-precision floating-point vector comparisons */
2170 DO_SPE_CMP(fscmplt);
2172 DO_SPE_CMP(fscmpgt);
2174 DO_SPE_CMP(fscmpeq);
2176 DO_SPE_CMP(fststlt);
2178 DO_SPE_CMP(fststgt);
2180 DO_SPE_CMP(fststeq);
2182 /* Single-precision floating-point vector conversions */
2196 DO_SPE_OP1(fsctsiz);
2198 DO_SPE_OP1(fsctuiz);
2203 #endif /* defined(TARGET_PPCSPE) */
2205 /*****************************************************************************/
2206 /* Softmmu support */
2207 #if !defined (CONFIG_USER_ONLY)
2209 #define MMUSUFFIX _mmu
2210 #define GETPC() (__builtin_return_address(0))
2213 #include "softmmu_template.h"
2216 #include "softmmu_template.h"
2219 #include "softmmu_template.h"
2222 #include "softmmu_template.h"
2224 /* try to fill the TLB and return an exception if error. If retaddr is
2225 NULL, it means that the function was called in C code (i.e. not
2226 from generated code or from helper.c) */
2227 /* XXX: fix it to restore all registers */
2228 void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
2230 TranslationBlock *tb;
2231 CPUState *saved_env;
2232 target_phys_addr_t pc;
2235 /* XXX: hack to restore env in all cases, even if not called from
2238 env = cpu_single_env;
2239 ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
2240 if (unlikely(ret != 0)) {
2241 if (likely(retaddr)) {
2242 /* now we have a real cpu fault */
2243 pc = (target_phys_addr_t)retaddr;
2244 tb = tb_find_pc(pc);
2246 /* the PC is inside the translated code. It means that we have
2247 a virtual CPU fault */
2248 cpu_restore_state(tb, env, pc, NULL);
2251 do_raise_exception_err(env->exception_index, env->error_code);
2256 /* TLB invalidation helpers */
2257 void do_tlbia (void)
2259 ppc_tlb_invalidate_all(env);
2262 void do_tlbie (void)
2265 #if !defined(FLUSH_ALL_TLBS)
2266 if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
2267 ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
2268 if (env->id_tlbs == 1)
2269 ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
2270 } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) {
2273 ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
2274 env->spr[SPR_BOOKE_PID]);
2277 /* tlbie invalidate TLBs for all segments */
2278 T0 &= TARGET_PAGE_MASK;
2279 T0 &= ~((target_ulong)-1 << 28);
2280 /* XXX: this case should be optimized,
2281 * giving a mask to tlb_flush_page
2283 tlb_flush_page(env, T0 | (0x0 << 28));
2284 tlb_flush_page(env, T0 | (0x1 << 28));
2285 tlb_flush_page(env, T0 | (0x2 << 28));
2286 tlb_flush_page(env, T0 | (0x3 << 28));
2287 tlb_flush_page(env, T0 | (0x4 << 28));
2288 tlb_flush_page(env, T0 | (0x5 << 28));
2289 tlb_flush_page(env, T0 | (0x6 << 28));
2290 tlb_flush_page(env, T0 | (0x7 << 28));
2291 tlb_flush_page(env, T0 | (0x8 << 28));
2292 tlb_flush_page(env, T0 | (0x9 << 28));
2293 tlb_flush_page(env, T0 | (0xA << 28));
2294 tlb_flush_page(env, T0 | (0xB << 28));
2295 tlb_flush_page(env, T0 | (0xC << 28));
2296 tlb_flush_page(env, T0 | (0xD << 28));
2297 tlb_flush_page(env, T0 | (0xE << 28));
2298 tlb_flush_page(env, T0 | (0xF << 28));
2305 #if defined(TARGET_PPC64)
2306 void do_tlbie_64 (void)
2309 #if !defined(FLUSH_ALL_TLBS)
2310 if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_6xx)) {
2311 ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
2312 if (env->id_tlbs == 1)
2313 ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
2314 } else if (unlikely(PPC_MMU(env) == PPC_FLAGS_MMU_SOFT_4xx)) {
2317 ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
2318 env->spr[SPR_BOOKE_PID]);
2321 /* tlbie invalidate TLBs for all segments
2322 * As we have 2^36 segments, invalidate all qemu TLBs
2325 T0 &= TARGET_PAGE_MASK;
2326 T0 &= ~((target_ulong)-1 << 28);
2327 /* XXX: this case should be optimized,
2328 * giving a mask to tlb_flush_page
2330 tlb_flush_page(env, T0 | (0x0 << 28));
2331 tlb_flush_page(env, T0 | (0x1 << 28));
2332 tlb_flush_page(env, T0 | (0x2 << 28));
2333 tlb_flush_page(env, T0 | (0x3 << 28));
2334 tlb_flush_page(env, T0 | (0x4 << 28));
2335 tlb_flush_page(env, T0 | (0x5 << 28));
2336 tlb_flush_page(env, T0 | (0x6 << 28));
2337 tlb_flush_page(env, T0 | (0x7 << 28));
2338 tlb_flush_page(env, T0 | (0x8 << 28));
2339 tlb_flush_page(env, T0 | (0x9 << 28));
2340 tlb_flush_page(env, T0 | (0xA << 28));
2341 tlb_flush_page(env, T0 | (0xB << 28));
2342 tlb_flush_page(env, T0 | (0xC << 28));
2343 tlb_flush_page(env, T0 | (0xD << 28));
2344 tlb_flush_page(env, T0 | (0xE << 28));
2345 tlb_flush_page(env, T0 | (0xF << 28));
2356 #if defined(TARGET_PPC64)
2357 void do_slbia (void)
2363 void do_slbie (void)
2370 /* Software driven TLBs management */
2371 /* PowerPC 602/603 software TLB load instructions helpers */
2372 void do_load_6xx_tlb (int is_code)
2374 target_ulong RPN, CMP, EPN;
2377 RPN = env->spr[SPR_RPA];
2379 CMP = env->spr[SPR_ICMP];
2380 EPN = env->spr[SPR_IMISS];
2382 CMP = env->spr[SPR_DCMP];
2383 EPN = env->spr[SPR_DMISS];
2385 way = (env->spr[SPR_SRR1] >> 17) & 1;
2386 #if defined (DEBUG_SOFTWARE_TLB)
2387 if (loglevel != 0) {
2388 fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
2389 __func__, (unsigned long)T0, (unsigned long)EPN,
2390 (unsigned long)CMP, (unsigned long)RPN, way);
2393 /* Store this TLB */
2394 ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK),
2395 way, is_code, CMP, RPN);
2398 static target_ulong booke_tlb_to_page_size (int size)
2400 return 1024 << (2 * size);
2403 static int booke_page_size_to_tlb (target_ulong page_size)
2407 switch (page_size) {
2441 #if defined (TARGET_PPC64)
2442 case 0x000100000000ULL:
2445 case 0x000400000000ULL:
2448 case 0x001000000000ULL:
2451 case 0x004000000000ULL:
2454 case 0x010000000000ULL:
2466 /* Helpers for 4xx TLB management */
2467 void do_4xx_tlbre_lo (void)
2473 tlb = &env->tlb[T0].tlbe;
2475 if (tlb->prot & PAGE_VALID)
2477 size = booke_page_size_to_tlb(tlb->size);
2478 if (size < 0 || size > 0x7)
2481 env->spr[SPR_40x_PID] = tlb->PID;
2484 void do_4xx_tlbre_hi (void)
2489 tlb = &env->tlb[T0].tlbe;
2491 if (tlb->prot & PAGE_EXEC)
2493 if (tlb->prot & PAGE_WRITE)
2497 static int tlb_4xx_search (target_ulong virtual)
2500 target_ulong base, mask;
2503 /* Default return value is no match */
2505 for (i = 0; i < 64; i++) {
2506 tlb = &env->tlb[i].tlbe;
2507 /* Check TLB validity */
2508 if (!(tlb->prot & PAGE_VALID))
2510 /* Check TLB PID vs current PID */
2511 if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID])
2513 /* Check TLB address vs virtual address */
2515 mask = ~(tlb->size - 1);
2516 if ((base & mask) != (virtual & mask))
2525 void do_4xx_tlbsx (void)
2527 T0 = tlb_4xx_search(T0);
2530 void do_4xx_tlbsx_ (void)
2534 T0 = tlb_4xx_search(T0);
2540 void do_4xx_tlbwe_hi (void)
2543 target_ulong page, end;
2545 #if defined (DEBUG_SOFTWARE_TLB)
2547 fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1);
2551 tlb = &env->tlb[T0].tlbe;
2552 /* Invalidate previous TLB (if it's valid) */
2553 if (tlb->prot & PAGE_VALID) {
2554 end = tlb->EPN + tlb->size;
2555 #if defined (DEBUG_SOFTWARE_TLB)
2557 fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX
2558 " end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end);
2561 for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
2562 tlb_flush_page(env, page);
2564 tlb->size = booke_tlb_to_page_size((T1 >> 7) & 0x7);
2565 tlb->EPN = (T1 & 0xFFFFFC00) & ~(tlb->size - 1);
2567 tlb->prot |= PAGE_VALID;
2569 tlb->prot &= ~PAGE_VALID;
2570 tlb->PID = env->spr[SPR_40x_PID]; /* PID */
2571 tlb->attr = T1 & 0xFF;
2572 #if defined (DEBUG_SOFTWARE_TLB)
2574 fprintf(logfile, "%s: set up TLB %d RPN " ADDRX " EPN " ADDRX
2575 " size " ADDRX " prot %c%c%c%c PID %d\n", __func__,
2576 (int)T0, tlb->RPN, tlb->EPN, tlb->size,
2577 tlb->prot & PAGE_READ ? 'r' : '-',
2578 tlb->prot & PAGE_WRITE ? 'w' : '-',
2579 tlb->prot & PAGE_EXEC ? 'x' : '-',
2580 tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID);
2583 /* Invalidate new TLB (if valid) */
2584 if (tlb->prot & PAGE_VALID) {
2585 end = tlb->EPN + tlb->size;
2586 #if defined (DEBUG_SOFTWARE_TLB)
2588 fprintf(logfile, "%s: invalidate TLB %d start " ADDRX
2589 " end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end);
2592 for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
2593 tlb_flush_page(env, page);
2597 void do_4xx_tlbwe_lo (void)
2601 #if defined (DEBUG_SOFTWARE_TLB)
2603 fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1);
2607 tlb = &env->tlb[T0].tlbe;
2608 tlb->RPN = T1 & 0xFFFFFC00;
2609 tlb->prot = PAGE_READ;
2611 tlb->prot |= PAGE_EXEC;
2613 tlb->prot |= PAGE_WRITE;
2614 #if defined (DEBUG_SOFTWARE_TLB)
2616 fprintf(logfile, "%s: set up TLB %d RPN " ADDRX " EPN " ADDRX
2617 " size " ADDRX " prot %c%c%c%c PID %d\n", __func__,
2618 (int)T0, tlb->RPN, tlb->EPN, tlb->size,
2619 tlb->prot & PAGE_READ ? 'r' : '-',
2620 tlb->prot & PAGE_WRITE ? 'w' : '-',
2621 tlb->prot & PAGE_EXEC ? 'x' : '-',
2622 tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID);
2626 #endif /* !CONFIG_USER_ONLY */