vcs.maemo.org Git - kernel-bfs/blob - kernel-maemo-2.6.28/debian/patches/overclock.diff

   1 --- kernel-maemo-2.6.28.orig/arch/arm/mach-omap2/omap3-opp.h
   2 +++ kernel-maemo-2.6.28/arch/arm/mach-omap2/omap3-opp.h
   3 @@ -4,13 +4,23 @@
   4  #include <mach/omap-pm.h>
   5
   6  /* MPU speeds */
   7 +#define S1150M  1150000000
   8 +#define S1100M  1100000000
   9 +#define S1000M  1000000000
  10 +#define S950M   950000000
  11 +#define S900M   900000000
  12 +#define S850M   850000000
  13 +#define S810M   810000000
  14 +#define S750M   750000000
  15 +#define S700M   700000000
  16  #define S600M   600000000
  17  #define S550M   550000000
  18  #define S500M   500000000
  19  #define S250M   250000000
  20 -#define S125M   125000000
  21 +#define S125M   124999000
  22
  23  /* DSP speeds */
  24 +#define S520M   500000000
  25  #define S430M   430000000
  26  #define S400M   400000000
  27  #define S360M   360000000
  28 @@ -21,42 +31,8 @@
  29  #define S83M    83000000
  30  #define S166M   166000000
  31
  32 -static struct omap_opp omap3_mpu_rate_table[] = {
  33 -       {0, 0, 0},
  34 -       /*OPP1*/
  35 -       {0, VDD1_OPP1, 0x1E},
  36 -       /*OPP2*/
  37 -       {S250M, VDD1_OPP2, 0x26},
  38 -       /*OPP3*/
  39 -       {S500M, VDD1_OPP3, 0x30},
  40 -       /*OPP4*/
  41 -       {S550M, VDD1_OPP4, 0x36},
  42 -       /*OPP5*/
  43 -       {S600M, VDD1_OPP5, 0x3C},
  44 -};
  45 -
  46 -static struct omap_opp omap3_l3_rate_table[] = {
  47 -       {0, 0, 0},
  48 -       /*OPP1*/
  49 -       {0, VDD2_OPP1, 0x1E},
  50 -       /*OPP2*/
  51 -       {S83M, VDD2_OPP2, 0x24},
  52 -       /*OPP3*/
  53 -       {S166M, VDD2_OPP3, 0x2C},
  54 -};
  55 -
  56 -static struct omap_opp omap3_dsp_rate_table[] = {
  57 -       {0, 0, 0},
  58 -       /*OPP1*/
  59 -       {S90M, VDD1_OPP1, 0x1E},
  60 -       /*OPP2*/
  61 -       {S180M, VDD1_OPP2, 0x26},
  62 -       /*OPP3*/
  63 -       {S360M, VDD1_OPP3, 0x30},
  64 -       /*OPP4*/
  65 -       {S400M, VDD1_OPP4, 0x36},
  66 -       /*OPP5*/
  67 -       {S430M, VDD1_OPP5, 0x3C},
  68 -};
  69 +extern struct omap_opp omap3_mpu_rate_table[];
  70 +extern struct omap_opp omap3_dsp_rate_table[];
  71 +extern struct omap_opp omap3_l3_rate_table[];
  72
  73  #endif
  74 --- kernel-maemo-2.6.28.orig/arch/arm/plat-omap/include/mach/omap34xx.h
  75 +++ kernel-maemo-2.6.28/arch/arm/plat-omap/include/mach/omap34xx.h
  76 @@ -114,7 +114,8 @@
  77  #define VDD2_OPP3      0x3
  78
  79  #define MIN_VDD1_OPP   VDD1_OPP1
  80 -#define MAX_VDD1_OPP   VDD1_OPP5
  81 +/*#define MAX_VDD1_OPP VDD1_OPP5*/
  82 +#define MAX_VDD1_OPP   15
  83  #define MIN_VDD2_OPP   VDD2_OPP1
  84  #define MAX_VDD2_OPP   VDD2_OPP3
  85
  86 --- kernel-maemo-2.6.28.orig/arch/arm/mach-omap2/smartreflex.c
  87 +++ kernel-maemo-2.6.28/arch/arm/mach-omap2/smartreflex.c
  88 @@ -37,6 +37,62 @@
  89  #include "prm.h"
  90  #include "smartreflex.h"
  91  #include "prm-regbits-34xx.h"
  92 +#include "omap3-opp.h"
  93 +
  94 +struct omap_opp omap3_mpu_rate_table[] = {
  95 +       {0, 0, 0},
  96 +       {0, 1, 0x1E},
  97 +       /*underclocking*/
  98 +       {S125M, 2, 0x1E},
  99 +       /*default*/
 100 +       {S250M, 3, 0x26},
 101 +       {S500M, 4, 0x30},
 102 +       {S550M, 5, 0x36},
 103 +       {S600M, 6, 0x3C},
 104 +       /*overclocking*/
 105 +       {S700M, 7, 0x3C},
 106 +       {S750M, 8, 0x3C},
 107 +       {S810M, 9, 0x3C},
 108 +       {S850M, 10, 0x3C},
 109 +       {S900M, 11, 0x3C},
 110 +       {S950M, 12, 0x3C},
 111 +       {S1000M, 13, 0x3C},
 112 +       {S1100M, 14, 0x43},
 113 +       {S1150M, 15, 0x48},
 114 +};
 115 +
 116 +struct omap_opp omap3_l3_rate_table[] = {
 117 +       {0, 0, 0},
 118 +       /*OPP1*/
 119 +       {0, VDD2_OPP1, 0x1E},
 120 +       /*OPP2*/
 121 +       {S83M, VDD2_OPP2, 0x24},
 122 +       /*OPP3*/
 123 +       {S166M, VDD2_OPP3, 0x2C},
 124 +};
 125 +
 126 +struct omap_opp omap3_dsp_rate_table[] = {
 127 +       {0, 0, 0},
 128 +       /*underclocking*/
 129 +       {S90M,  1, 0x1E},
 130 +       /*default*/
 131 +       {S90M,  2, 0x1E},
 132 +       {S180M, 3, 0x26},
 133 +       {S360M, 4, 0x30},
 134 +       {S400M, 5, 0x36},
 135 +       {S430M, 6, 0x3C},
 136 +       /*overclocking*/
 137 +       {S430M, 7, 0x3C},
 138 +       {S430M, 8, 0x3C},
 139 +       {S430M, 9, 0x3C},/*800MHz*/
 140 +       {S520M, 10, 0x3C},
 141 +       {S520M, 11, 0x3C},
 142 +       {S520M, 12, 0x3C},
 143 +       {S520M, 13, 0x3C},
 144 +       {S520M, 14, 0x3C},
 145 +       {S520M, 15, 0x3C},
 146 +};
 147 +
 148
 149  /*
 150   * VP_TRANXDONE_TIMEOUT: maximum microseconds to wait for the VP to
 151 @@ -513,7 +569,7 @@
 152         sr->req_opp_no = target_opp_no;
 153
 154         if (sr->srid == SR1) {
 155 -               switch (target_opp_no) {
 156 +               switch (min(target_opp_no-1,5)) {
 157                 case 5:
 158                         nvalue_reciprocal = sr->opp5_nvalue;
 159                         break;
 160 @@ -527,6 +583,7 @@
 161                         nvalue_reciprocal = sr->opp2_nvalue;
 162                         break;
 163                 case 1:
 164 +               case 0:
 165                         nvalue_reciprocal = sr->opp1_nvalue;
 166                         break;
 167                 default:
 168 @@ -564,6 +621,8 @@
 169                         (ERRCONFIG_VPBOUNDINTEN | ERRCONFIG_VPBOUNDINTST));
 170
 171         if (sr->srid == SR1) {
 172 +               /*printk(KERN_NOTICE "OPP%d setting voltage %d\n",
 173 +                                                               target_opp_no,mpu_opps[target_opp_no].vsel);*/
 174                 errminlimit = (target_opp_no > SR_MAX_LOW_OPP) ?
 175                         SR1_ERRMINLIMIT_HIGHOPP : SR1_ERRMINLIMIT_LOWOPP;
 176
 177 @@ -866,6 +925,8 @@
 178         current_opp_no = get_opp_no(current_opp);
 179
 180         if (vdd == PRCM_VDD1) {
 181 +               /*printk(KERN_DEBUG "OPP%d bypass setting voltage %d\n",
 182 +                                                               target_opp_no,target_vsel);*/
 183                 t2_smps_steps = abs(target_vsel - current_vsel);
 184                 errorgain = (target_opp_no > SR_MAX_LOW_OPP) ?
 185                         PRM_VP1_CONFIG_ERRORGAIN_HIGHOPP :
 186 @@ -940,6 +1001,57 @@
 187         return SR_PASS;
 188  }
 189
 190 +static ssize_t omap_sr_vdd1_opps_vsel_show(struct kobject *kobj,
 191 +                                       struct kobj_attribute *attr, char *buf)
 192 +{
 193 +       int i;
 194 +       char *b=buf;
 195 +       for(i=1;i<=MAX_VDD1_OPP;i++)
 196 +               b+=sprintf(b, "%d ", mpu_opps[i].vsel);
 197 +       b+=sprintf(b, "\n");
 198 +       return b-buf;
 199 +}
 200 +
 201 +static ssize_t omap_sr_vdd1_opps_vsel_store(struct kobject *kobj,
 202 +                                       struct kobj_attribute *attr,
 203 +                                       const char *buf, size_t n)
 204 +{
 205 +       unsigned short value[16];
 206 +       int i;
 207 +
 208 +       if (sscanf(buf, "%hu %hu %hu %hu %hu %hu %hu %hu %hu %hu %hu %hu %hu %hu %hu %hu",
 209 +                               &value[0], &value[1], &value[2], &value[3],
 210 +                               &value[4], &value[5], &value[6], &value[7],
 211 +                               &value[8], &value[9], &value[10], &value[11],
 212 +                               &value[12], &value[13], &value[14], &value[15]
 213 +                               ) != MAX_VDD1_OPP) {
 214 +               printk(KERN_ERR "sr_vdd1_opps_vsel: Invalid value\n");
 215 +               return -EINVAL;
 216 +       }
 217 +
 218 +       mutex_lock(&dvfs_mutex);
 219 +
 220 +       for(i=1;i<=MAX_VDD1_OPP;i++) {
 221 +               if(value[i-1]<0x49) {
 222 +                       mpu_opps[i].vsel = value[i-1];
 223 +               }
 224 +       }
 225 +
 226 +       mutex_unlock(&dvfs_mutex);
 227 +
 228 +       return n;
 229 +}
 230 +
 231 +static struct kobj_attribute sr_vdd1_opps_vsel = {
 232 +       .attr = {
 233 +       .name = __stringify(sr_vdd1_opps_vsel),
 234 +       .mode = 0644,
 235 +       },
 236 +       .show = omap_sr_vdd1_opps_vsel_show,
 237 +       .store = omap_sr_vdd1_opps_vsel_store,
 238 +};
 239 +
 240 +
 241  /* Sysfs interface to select SR VDD1 auto compensation */
 242  static ssize_t omap_sr_vdd1_autocomp_show(struct kobject *kobj,
 243                                         struct kobj_attribute *attr, char *buf)
 244 @@ -1075,6 +1187,10 @@
 245
 246         printk(KERN_INFO "SmartReflex driver initialized\n");
 247
 248 +       ret = sysfs_create_file(power_kobj, &sr_vdd1_opps_vsel.attr);
 249 +       if (ret)
 250 +               printk(KERN_ERR "sysfs_create_file failed: %d\n", ret);
 251 +
 252         ret = sysfs_create_file(power_kobj, &sr_vdd1_autocomp.attr);
 253         if (ret)
 254                 printk(KERN_ERR "sysfs_create_file failed: %d\n", ret);
 255 --- kernel-maemo-2.6.28.orig/arch/arm/plat-omap/cpu-omap.c
 256 +++ kernel-maemo-2.6.28/arch/arm/plat-omap/cpu-omap.c
 257 @@ -148,10 +148,13 @@
 258                                                         VERY_HI_RATE) / 1000;
 259         }
 260
 261 -       clk_set_rate(mpu_clk, policy->cpuinfo.max_freq * 1000);
 262 +       /*clk_set_rate(mpu_clk, policy->cpuinfo.max_freq * 1000);*/
 263 +       clk_set_rate(mpu_clk, 600000 * 1000); /*N900 hack: set default max to 600MHz */
 264
 265 -       policy->min = policy->cpuinfo.min_freq;
 266 -       policy->max = policy->cpuinfo.max_freq;
 267 +       /*policy->min = policy->cpuinfo.min_freq;*/
 268 +       /*policy->max = policy->cpuinfo.max_freq;*/
 269 +       policy->min = 250000;
 270 +       policy->max = 600000; /*N900 hack: set default to 250-600MHz */
 271         policy->cur = omap_getspeed(0);
 272
 273         policy->cpuinfo.transition_latency = 300 * 1000;
 274 --- kernel-maemo-2.6.28.orig/arch/arm/mach-omap2/smartreflex.h
 275 +++ kernel-maemo-2.6.28/arch/arm/mach-omap2/smartreflex.h
 276 @@ -254,7 +254,7 @@
 277  /* XXX: end remove/move */
 278
 279  /* SR_MAX_LOW_OPP: the highest of the "low OPPs", 1 and 2. */
 280 -#define SR_MAX_LOW_OPP         2
 281 +#define SR_MAX_LOW_OPP         3
 282
 283  /* XXX: find more appropriate place for these once DVFS is in place */
 284  extern u32 current_vdd1_opp;
 285 --- kernel-maemo-2.6.28.orig/drivers/cpufreq/cpufreq.c
 286 +++ kernel-maemo-2.6.28/drivers/cpufreq/cpufreq.c
 287 @@ -465,7 +465,7 @@
 288  /**
 289   * cpufreq_per_cpu_attr_write() / store_##file_name() - sysfs write access
 290   */
 291 -#define store_one(file_name, object)                   \
 292 +#define store_one(file_name, object,ignore)                    \
 293  static ssize_t store_##file_name                                       \
 294  (struct cpufreq_policy *policy, const char *buf, size_t count)         \
 295  {                                                                      \
 296 @@ -479,15 +479,16 @@
 297         ret = sscanf (buf, "%u", &new_policy.object);                   \
 298         if (ret != 1)                                                   \
 299                 return -EINVAL;                                         \
 300 -                                                                       \
 301 -       ret = __cpufreq_set_policy(policy, &new_policy);                \
 302 +       printk(KERN_DEBUG "cpufreq: request %u -> %u\n",policy->object,new_policy.object);      \
 303 +       if (new_policy.object != ignore && new_policy.object >= 100000) \
 304 +           ret = __cpufreq_set_policy(policy, &new_policy);            \
 305         policy->user_policy.object = policy->object;                    \
 306                                                                         \
 307         return ret ? ret : count;                                       \
 308  }
 309
 310 -store_one(scaling_min_freq,min);
 311 -store_one(scaling_max_freq,max);
 312 +store_one(scaling_min_freq,min,0);
 313 +store_one(scaling_max_freq,max,600000);
 314
 315  /**
 316   * show_cpuinfo_cur_freq - current CPU frequency as detected by hardware