2 * QEMU TCX Frame buffer
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #define TCX_DAC_NREGS 16
30 typedef struct TCXState {
34 ram_addr_t vram_offset;
35 uint16_t width, height;
36 uint8_t r[256], g[256], b[256];
37 uint32_t palette[256];
38 uint8_t dac_index, dac_state;
41 static void tcx_screen_dump(void *opaque, const char *filename);
43 /* XXX: unify with vga draw line functions */
44 static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
46 return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
49 static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
51 return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
54 static inline unsigned int rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
56 return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
59 static inline unsigned int rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
61 return (r << 16) | (g << 8) | b;
64 static void update_palette_entries(TCXState *s, int start, int end)
67 for(i = start; i < end; i++) {
68 switch(s->ds->depth) {
71 s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
74 s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
77 s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
80 s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
86 static void tcx_draw_line32(TCXState *s1, uint8_t *d,
87 const uint8_t *s, int width)
92 for(x = 0; x < width; x++) {
94 *((uint32_t *)d)++ = s1->palette[val];
98 static void tcx_draw_line16(TCXState *s1, uint8_t *d,
99 const uint8_t *s, int width)
104 for(x = 0; x < width; x++) {
106 *((uint16_t *)d)++ = s1->palette[val];
110 static void tcx_draw_line8(TCXState *s1, uint8_t *d,
111 const uint8_t *s, int width)
116 for(x = 0; x < width; x++) {
118 *d++ = s1->palette[val];
122 /* Fixed line length 1024 allows us to do nice tricks not possible on
124 static void tcx_update_display(void *opaque)
126 TCXState *ts = opaque;
127 ram_addr_t page, page_min, page_max;
128 int y, y_start, dd, ds;
130 void (*f)(TCXState *s1, uint8_t *d, const uint8_t *s, int width);
132 if (ts->ds->depth == 0)
134 page = ts->vram_offset;
136 page_min = 0xffffffff;
140 dd = ts->ds->linesize;
143 switch (ts->ds->depth) {
159 for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE) {
160 if (cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG)) {
167 f(ts, d, s, ts->width);
170 f(ts, d, s, ts->width);
173 f(ts, d, s, ts->width);
176 f(ts, d, s, ts->width);
181 /* flush to display */
182 dpy_update(ts->ds, 0, y_start,
183 ts->width, y - y_start);
191 /* flush to display */
192 dpy_update(ts->ds, 0, y_start,
193 ts->width, y - y_start);
195 /* reset modified pages */
196 if (page_min <= page_max) {
197 cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE,
202 static void tcx_invalidate_display(void *opaque)
204 TCXState *s = opaque;
207 for (i = 0; i < MAXX*MAXY; i += TARGET_PAGE_SIZE) {
208 cpu_physical_memory_set_dirty(s->vram_offset + i);
212 static void tcx_save(QEMUFile *f, void *opaque)
214 TCXState *s = opaque;
216 qemu_put_be32s(f, (uint32_t *)&s->addr);
217 qemu_put_be32s(f, (uint32_t *)&s->vram);
218 qemu_put_be16s(f, (uint16_t *)&s->height);
219 qemu_put_be16s(f, (uint16_t *)&s->width);
220 qemu_put_buffer(f, s->r, 256);
221 qemu_put_buffer(f, s->g, 256);
222 qemu_put_buffer(f, s->b, 256);
223 qemu_put_8s(f, &s->dac_index);
224 qemu_put_8s(f, &s->dac_state);
227 static int tcx_load(QEMUFile *f, void *opaque, int version_id)
229 TCXState *s = opaque;
234 qemu_get_be32s(f, (uint32_t *)&s->addr);
235 qemu_get_be32s(f, (uint32_t *)&s->vram);
236 qemu_get_be16s(f, (uint16_t *)&s->height);
237 qemu_get_be16s(f, (uint16_t *)&s->width);
238 qemu_get_buffer(f, s->r, 256);
239 qemu_get_buffer(f, s->g, 256);
240 qemu_get_buffer(f, s->b, 256);
241 qemu_get_8s(f, &s->dac_index);
242 qemu_get_8s(f, &s->dac_state);
243 update_palette_entries(s, 0, 256);
247 static void tcx_reset(void *opaque)
249 TCXState *s = opaque;
251 /* Initialize palette */
252 memset(s->r, 0, 256);
253 memset(s->g, 0, 256);
254 memset(s->b, 0, 256);
255 s->r[255] = s->g[255] = s->b[255] = 255;
256 update_palette_entries(s, 0, 256);
257 memset(s->vram, 0, MAXX*MAXY);
258 cpu_physical_memory_reset_dirty(s->vram_offset, s->vram_offset + MAXX*MAXY,
264 static uint32_t tcx_dac_readl(void *opaque, target_phys_addr_t addr)
269 static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
271 TCXState *s = opaque;
274 saddr = (addr & (TCX_DAC_NREGS - 1)) >> 2;
277 s->dac_index = val >> 24;
281 switch (s->dac_state) {
283 s->r[s->dac_index] = val >> 24;
284 update_palette_entries(s, s->dac_index, s->dac_index + 1);
288 s->g[s->dac_index] = val >> 24;
289 update_palette_entries(s, s->dac_index, s->dac_index + 1);
293 s->b[s->dac_index] = val >> 24;
294 update_palette_entries(s, s->dac_index, s->dac_index + 1);
306 static CPUReadMemoryFunc *tcx_dac_read[3] = {
312 static CPUWriteMemoryFunc *tcx_dac_write[3] = {
318 void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
319 unsigned long vram_offset, int vram_size, int width, int height)
324 s = qemu_mallocz(sizeof(TCXState));
330 s->vram_offset = vram_offset;
334 cpu_register_physical_memory(addr + 0x800000, vram_size, vram_offset);
335 io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
336 cpu_register_physical_memory(addr + 0x200000, TCX_DAC_NREGS, io_memory);
338 graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
340 register_savevm("tcx", addr, 1, tcx_save, tcx_load, s);
341 qemu_register_reset(tcx_reset, s);
343 dpy_resize(s->ds, width, height);
346 static void tcx_screen_dump(void *opaque, const char *filename)
348 TCXState *s = opaque;
353 f = fopen(filename, "wb");
356 fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255);
358 for(y = 0; y < s->height; y++) {
360 for(x = 0; x < s->width; x++) {