2 * QEMU Sparc SLAVIO timer controller emulation
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
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11 * furnished to do so, subject to the following conditions:
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29 #define DPRINTF(fmt, args...) \
30 do { printf("TIMER: " fmt , ##args); } while (0)
32 #define DPRINTF(fmt, args...)
36 * Registers of hardware timer in sun4m.
38 * This is the timer/counter part of chip STP2001 (Slave I/O), also
39 * produced as NCR89C105. See
40 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
42 * The 31-bit counter is incremented every 500ns by bit 9. Bits 8..0
43 * are zero. Bit 31 is 1 when count has been reached.
47 typedef struct SLAVIO_TIMERState {
48 uint32_t limit, count, counthigh;
49 int64_t count_load_time;
51 int64_t stop_time, tick_offset;
55 int mode; // 0 = processor, 1 = user, 2 = system
58 #define TIMER_MAXADDR 0x1f
59 #define CNT_FREQ 2000000
62 // Update count, set irq, update expire_time
63 static void slavio_timer_get_out(SLAVIO_TIMERState *s)
66 int64_t diff, ticks, count;
69 // There are three clock tick units: CPU ticks, register units
70 // (nanoseconds), and counter ticks (500 ns).
71 if (s->mode == 1 && s->stopped)
74 ticks = qemu_get_clock(vm_clock) - s->tick_offset;
76 out = (ticks >= s->expire_time);
78 s->reached = 0x80000000;
84 // Convert register units to counter ticks
87 // Convert cpu ticks to counter ticks
88 diff = muldiv64(ticks - s->count_load_time, CNT_FREQ, ticks_per_sec);
90 // Calculate what the counter should be, convert to register
93 s->count = count << 9;
94 s->counthigh = count >> 22;
96 // Expire time: CPU ticks left to next interrupt
97 // Convert remaining counter ticks to CPU ticks
98 s->expire_time = ticks + muldiv64(limit - count, ticks_per_sec, CNT_FREQ);
100 DPRINTF("irq %d limit %d reached %d d %lld count %d s->c %x diff %lld stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode);
103 pic_set_irq(s->irq, out);
107 static void slavio_timer_irq(void *opaque)
109 SLAVIO_TIMERState *s = opaque;
113 slavio_timer_get_out(s);
115 qemu_mod_timer(s->irq_timer, s->expire_time);
118 static uint32_t slavio_timer_mem_readl(void *opaque, target_phys_addr_t addr)
120 SLAVIO_TIMERState *s = opaque;
123 saddr = (addr & TIMER_MAXADDR) >> 2;
126 // read limit (system counter mode) or read most signifying
127 // part of counter (user mode)
130 pic_set_irq(s->irq, 0);
131 s->count_load_time = qemu_get_clock(vm_clock);
136 slavio_timer_get_out(s);
137 return s->counthigh & 0x7fffffff;
140 // read counter and reached bit (system mode) or read lsbits
141 // of counter (user mode)
142 slavio_timer_get_out(s);
144 return (s->count & 0x7fffffff) | s->reached;
148 // read start/stop status
151 // read user/system mode
158 static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
160 SLAVIO_TIMERState *s = opaque;
163 saddr = (addr & TIMER_MAXADDR) >> 2;
166 // set limit, reset counter
167 s->count_load_time = qemu_get_clock(vm_clock);
170 // set limit without resetting counter
172 s->limit = 0x7fffffff;
174 s->limit = val & 0x7fffffff;
178 // start/stop user counter
181 s->stop_time = qemu_get_clock(vm_clock);
186 s->tick_offset += qemu_get_clock(vm_clock) - s->stop_time;
192 // bit 0: user (1) or system (0) counter mode
193 if (s->mode == 0 || s->mode == 1)
201 static CPUReadMemoryFunc *slavio_timer_mem_read[3] = {
202 slavio_timer_mem_readl,
203 slavio_timer_mem_readl,
204 slavio_timer_mem_readl,
207 static CPUWriteMemoryFunc *slavio_timer_mem_write[3] = {
208 slavio_timer_mem_writel,
209 slavio_timer_mem_writel,
210 slavio_timer_mem_writel,
213 static void slavio_timer_save(QEMUFile *f, void *opaque)
215 SLAVIO_TIMERState *s = opaque;
217 qemu_put_be32s(f, &s->limit);
218 qemu_put_be32s(f, &s->count);
219 qemu_put_be32s(f, &s->counthigh);
220 qemu_put_be64s(f, &s->count_load_time);
221 qemu_put_be64s(f, &s->expire_time);
222 qemu_put_be64s(f, &s->stop_time);
223 qemu_put_be64s(f, &s->tick_offset);
224 qemu_put_be32s(f, &s->irq);
225 qemu_put_be32s(f, &s->reached);
226 qemu_put_be32s(f, &s->stopped);
227 qemu_put_be32s(f, &s->mode);
230 static int slavio_timer_load(QEMUFile *f, void *opaque, int version_id)
232 SLAVIO_TIMERState *s = opaque;
237 qemu_get_be32s(f, &s->limit);
238 qemu_get_be32s(f, &s->count);
239 qemu_get_be32s(f, &s->counthigh);
240 qemu_get_be64s(f, &s->count_load_time);
241 qemu_get_be64s(f, &s->expire_time);
242 qemu_get_be64s(f, &s->stop_time);
243 qemu_get_be64s(f, &s->tick_offset);
244 qemu_get_be32s(f, &s->irq);
245 qemu_get_be32s(f, &s->reached);
246 qemu_get_be32s(f, &s->stopped);
247 qemu_get_be32s(f, &s->mode);
251 static void slavio_timer_reset(void *opaque)
253 SLAVIO_TIMERState *s = opaque;
257 s->count_load_time = qemu_get_clock(vm_clock);;
258 s->stop_time = s->count_load_time;
263 slavio_timer_get_out(s);
266 static void slavio_timer_init_internal(uint32_t addr, int irq, int mode)
268 int slavio_timer_io_memory;
269 SLAVIO_TIMERState *s;
271 s = qemu_mallocz(sizeof(SLAVIO_TIMERState));
276 s->irq_timer = qemu_new_timer(vm_clock, slavio_timer_irq, s);
278 slavio_timer_io_memory = cpu_register_io_memory(0, slavio_timer_mem_read,
279 slavio_timer_mem_write, s);
280 cpu_register_physical_memory(addr, TIMER_MAXADDR, slavio_timer_io_memory);
281 register_savevm("slavio_timer", addr, 1, slavio_timer_save, slavio_timer_load, s);
282 qemu_register_reset(slavio_timer_reset, s);
283 slavio_timer_reset(s);
286 void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2)
290 for (i = 0; i < MAX_CPUS; i++) {
291 slavio_timer_init_internal(addr1 + i * TARGET_PAGE_SIZE, irq1, 0);
294 slavio_timer_init_internal(addr2, irq2, 2);