2 * QEMU Sparc SLAVIO timer controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
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7 * of this software and associated documentation files (the "Software"), to deal
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29 * Registers of hardware timer in sun4m.
31 * This is the timer/counter part of chip STP2001 (Slave I/O), also
32 * produced as NCR89C105. See
33 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
35 * The 31-bit counter is incremented every 500ns by bit 9. Bits 8..0
36 * are zero. Bit 31 is 1 when count has been reached.
40 typedef struct SLAVIO_TIMERState {
41 uint32_t limit, count, counthigh;
42 int64_t count_load_time;
44 int64_t stop_time, tick_offset;
48 int mode; // 0 = processor, 1 = user, 2 = system
51 #define TIMER_MAXADDR 0x1f
52 #define CNT_FREQ 2000000
55 // Update count, set irq, update expire_time
56 static void slavio_timer_get_out(SLAVIO_TIMERState *s)
59 int64_t diff, ticks, count;
62 // There are three clock tick units: CPU ticks, register units
63 // (nanoseconds), and counter ticks (500 ns).
64 if (s->mode == 1 && s->stopped)
67 ticks = qemu_get_clock(vm_clock) - s->tick_offset;
69 out = (ticks >= s->expire_time);
71 s->reached = 0x80000000;
77 // Convert register units to counter ticks
80 // Convert cpu ticks to counter ticks
81 diff = muldiv64(ticks - s->count_load_time, CNT_FREQ, ticks_per_sec);
83 // Calculate what the counter should be, convert to register
86 s->count = count << 9;
87 s->counthigh = count >> 22;
89 // Expire time: CPU ticks left to next interrupt
90 // Convert remaining counter ticks to CPU ticks
91 s->expire_time = ticks + muldiv64(limit - count, ticks_per_sec, CNT_FREQ);
94 term_printf("timer: irq %d limit %d reached %d d %lld count %d s->c %x diff %lld stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode);
97 pic_set_irq(s->irq, out);
101 static void slavio_timer_irq(void *opaque)
103 SLAVIO_TIMERState *s = opaque;
107 slavio_timer_get_out(s);
109 qemu_mod_timer(s->irq_timer, s->expire_time);
112 static uint32_t slavio_timer_mem_readl(void *opaque, target_phys_addr_t addr)
114 SLAVIO_TIMERState *s = opaque;
117 saddr = (addr & TIMER_MAXADDR) >> 2;
120 // read limit (system counter mode) or read most signifying
121 // part of counter (user mode)
124 pic_set_irq(s->irq, 0);
125 s->count_load_time = qemu_get_clock(vm_clock);
130 slavio_timer_get_out(s);
131 return s->counthigh & 0x7fffffff;
134 // read counter and reached bit (system mode) or read lsbits
135 // of counter (user mode)
136 slavio_timer_get_out(s);
138 return (s->count & 0x7fffffff) | s->reached;
142 // read start/stop status
145 // read user/system mode
152 static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
154 SLAVIO_TIMERState *s = opaque;
157 saddr = (addr & TIMER_MAXADDR) >> 2;
160 // set limit, reset counter
161 s->count_load_time = qemu_get_clock(vm_clock);
164 // set limit without resetting counter
166 s->limit = 0x7fffffff;
168 s->limit = val & 0x7fffffff;
172 // start/stop user counter
175 s->stop_time = qemu_get_clock(vm_clock);
180 s->tick_offset += qemu_get_clock(vm_clock) - s->stop_time;
186 // bit 0: user (1) or system (0) counter mode
187 if (s->mode == 0 || s->mode == 1)
195 static CPUReadMemoryFunc *slavio_timer_mem_read[3] = {
196 slavio_timer_mem_readl,
197 slavio_timer_mem_readl,
198 slavio_timer_mem_readl,
201 static CPUWriteMemoryFunc *slavio_timer_mem_write[3] = {
202 slavio_timer_mem_writel,
203 slavio_timer_mem_writel,
204 slavio_timer_mem_writel,
207 static void slavio_timer_save(QEMUFile *f, void *opaque)
209 SLAVIO_TIMERState *s = opaque;
211 qemu_put_be32s(f, &s->limit);
212 qemu_put_be32s(f, &s->count);
213 qemu_put_be32s(f, &s->counthigh);
214 qemu_put_be64s(f, &s->count_load_time);
215 qemu_put_be64s(f, &s->expire_time);
216 qemu_put_be64s(f, &s->stop_time);
217 qemu_put_be64s(f, &s->tick_offset);
218 qemu_put_be32s(f, &s->irq);
219 qemu_put_be32s(f, &s->reached);
220 qemu_put_be32s(f, &s->stopped);
221 qemu_put_be32s(f, &s->mode);
224 static int slavio_timer_load(QEMUFile *f, void *opaque, int version_id)
226 SLAVIO_TIMERState *s = opaque;
231 qemu_get_be32s(f, &s->limit);
232 qemu_get_be32s(f, &s->count);
233 qemu_get_be32s(f, &s->counthigh);
234 qemu_get_be64s(f, &s->count_load_time);
235 qemu_get_be64s(f, &s->expire_time);
236 qemu_get_be64s(f, &s->stop_time);
237 qemu_get_be64s(f, &s->tick_offset);
238 qemu_get_be32s(f, &s->irq);
239 qemu_get_be32s(f, &s->reached);
240 qemu_get_be32s(f, &s->stopped);
241 qemu_get_be32s(f, &s->mode);
245 static void slavio_timer_reset(void *opaque)
247 SLAVIO_TIMERState *s = opaque;
251 s->count_load_time = qemu_get_clock(vm_clock);;
252 s->stop_time = s->count_load_time;
257 slavio_timer_get_out(s);
260 static void slavio_timer_init_internal(uint32_t addr, int irq, int mode)
262 int slavio_timer_io_memory;
263 SLAVIO_TIMERState *s;
265 s = qemu_mallocz(sizeof(SLAVIO_TIMERState));
270 s->irq_timer = qemu_new_timer(vm_clock, slavio_timer_irq, s);
272 slavio_timer_io_memory = cpu_register_io_memory(0, slavio_timer_mem_read,
273 slavio_timer_mem_write, s);
274 cpu_register_physical_memory(addr, TIMER_MAXADDR, slavio_timer_io_memory);
275 register_savevm("slavio_timer", addr, 1, slavio_timer_save, slavio_timer_load, s);
276 qemu_register_reset(slavio_timer_reset, s);
277 slavio_timer_reset(s);
280 void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2)
284 for (i = 0; i < MAX_CPUS; i++) {
285 slavio_timer_init_internal(addr1 + i * TARGET_PAGE_SIZE, irq1, 0);
288 slavio_timer_init_internal(addr2, irq2, 2);