2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
41 #include <netinet/in.h>
46 /* output Bochs bios info messages */
49 #define BIOS_FILENAME "bios.bin"
50 #define VGABIOS_FILENAME "vgabios.bin"
51 #define LINUX_BOOT_FILENAME "linux_boot.bin"
53 #define KERNEL_LOAD_ADDR 0x00100000
54 #define INITRD_LOAD_ADDR 0x00400000
55 #define KERNEL_PARAMS_ADDR 0x00090000
56 #define KERNEL_CMDLINE_ADDR 0x00099000
59 int dummy_refresh_clock;
61 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
65 #define REG_EQUIPMENT_BYTE 0x14
67 static void cmos_init(int ram_size, int boot_device)
69 RTCState *s = &rtc_state;
73 /* various important CMOS locations needed by PC/Bochs bios */
75 s->cmos_data[REG_EQUIPMENT_BYTE] = 0x02; /* FPU is there */
76 s->cmos_data[REG_EQUIPMENT_BYTE] |= 0x04; /* PS/2 mouse installed */
79 val = (ram_size / 1024) - 1024;
82 s->cmos_data[0x17] = val;
83 s->cmos_data[0x18] = val >> 8;
84 s->cmos_data[0x30] = val;
85 s->cmos_data[0x31] = val >> 8;
87 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
90 s->cmos_data[0x34] = val;
91 s->cmos_data[0x35] = val >> 8;
96 s->cmos_data[0x3d] = 0x01; /* floppy boot */
100 s->cmos_data[0x3d] = 0x02; /* hard drive boot */
103 s->cmos_data[0x3d] = 0x03; /* CD-ROM boot */
109 fd0 = fdctrl_get_drive_type(0);
110 fd1 = fdctrl_get_drive_type(1);
112 s->cmos_data[0x10] = 0;
115 /* 1.44 Mb 3"5 drive */
116 s->cmos_data[0x10] |= 0x40;
119 /* 2.88 Mb 3"5 drive */
120 s->cmos_data[0x10] |= 0x60;
123 /* 1.2 Mb 5"5 drive */
124 s->cmos_data[0x10] |= 0x20;
129 /* 1.44 Mb 3"5 drive */
130 s->cmos_data[0x10] |= 0x04;
133 /* 2.88 Mb 3"5 drive */
134 s->cmos_data[0x10] |= 0x06;
137 /* 1.2 Mb 5"5 drive */
138 s->cmos_data[0x10] |= 0x02;
150 s->cmos_data[REG_EQUIPMENT_BYTE] |= 0x01; /* 1 drive, ready for boot */
153 s->cmos_data[REG_EQUIPMENT_BYTE] |= 0x41; /* 2 drives, ready for boot */
158 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
160 speaker_data_on = (val >> 1) & 1;
161 pit_set_gate(&pit_channels[2], val & 1);
164 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
167 out = pit_get_out(&pit_channels[2]);
168 dummy_refresh_clock ^= 1;
169 return (speaker_data_on << 1) | pit_channels[2].gate | (out << 5) |
170 (dummy_refresh_clock << 4);
173 /***********************************************************/
174 /* Bochs BIOS debug ports */
176 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
179 /* Bochs BIOS messages */
182 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
187 fprintf(stderr, "%c", val);
191 /* LGPL'ed VGA BIOS messages */
194 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
199 fprintf(stderr, "%c", val);
205 void bochs_bios_init(void)
207 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
208 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
209 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
210 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
212 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
213 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
214 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
215 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
219 int load_kernel(const char *filename, uint8_t *addr,
225 fd = open(filename, O_RDONLY);
229 /* load 16 bit code */
230 if (read(fd, real_addr, 512) != 512)
232 setup_sects = real_addr[0x1F1];
235 if (read(fd, real_addr + 512, setup_sects * 512) !=
239 /* load 32 bit code */
240 size = read(fd, addr, 16 * 1024 * 1024);
250 static const int ide_iobase[2] = { 0x1f0, 0x170 };
251 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
252 static const int ide_irq[2] = { 14, 15 };
254 #define NE2000_NB_MAX 6
256 static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
257 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
259 /* PC hardware initialisation */
260 void pc_init(int ram_size, int vga_ram_size, int boot_device,
261 DisplayState *ds, const char **fd_filename, int snapshot,
262 const char *kernel_filename, const char *kernel_cmdline,
263 const char *initrd_filename)
266 int ret, linux_boot, initrd_size, i, nb_nics1, fd;
268 linux_boot = (kernel_filename != NULL);
271 cpu_register_physical_memory(0, ram_size, 0);
274 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
275 ret = load_image(buf, phys_ram_base + 0x000f0000);
276 if (ret != 0x10000) {
277 fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
282 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
283 ret = load_image(buf, phys_ram_base + 0x000c0000);
285 /* setup basic memory access */
286 cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
287 cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
292 uint8_t bootsect[512];
294 if (bs_table[0] == NULL) {
295 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
298 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
299 ret = load_image(buf, bootsect);
300 if (ret != sizeof(bootsect)) {
301 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
306 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
308 /* now we can load the kernel */
309 ret = load_kernel(kernel_filename,
310 phys_ram_base + KERNEL_LOAD_ADDR,
311 phys_ram_base + KERNEL_PARAMS_ADDR);
313 fprintf(stderr, "qemu: could not load kernel '%s'\n",
320 if (initrd_filename) {
321 initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
322 if (initrd_size < 0) {
323 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
328 if (initrd_size > 0) {
329 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
330 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
332 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
334 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
335 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
336 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
338 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
341 /* init basic PC hardware */
342 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
344 vga_initialize(ds, phys_ram_base + ram_size, ram_size,
348 register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
349 register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
354 fd = serial_open_device();
355 serial_init(0x3f8, 4, fd);
358 if (nb_nics1 > NE2000_NB_MAX)
359 nb_nics1 = NE2000_NB_MAX;
360 for(i = 0; i < nb_nics1; i++) {
361 ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
364 for(i = 0; i < 2; i++) {
365 ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
366 bs_table[2 * i], bs_table[2 * i + 1]);
373 fdctrl_init(6, 2, 0, 0x3f0, fd_table);
375 cmos_init(ram_size, boot_device);