2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 /* output Bochs bios info messages */
29 #define BIOS_FILENAME "bios.bin"
30 #define VGABIOS_FILENAME "vgabios.bin"
31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
34 #define KERNEL_LOAD_ADDR 0x00100000
35 #define INITRD_LOAD_ADDR 0x00400000
36 #define KERNEL_PARAMS_ADDR 0x00090000
37 #define KERNEL_CMDLINE_ADDR 0x00099000
40 int dummy_refresh_clock;
41 static fdctrl_t *floppy_controller;
42 static RTCState *rtc_state;
45 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
49 /* MSDOS compatibility mode FPU exception support */
50 /* XXX: add IGNNE support */
51 void cpu_set_ferr(CPUX86State *s)
56 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
63 uint64_t cpu_get_tsc(CPUX86State *env)
65 return qemu_get_clock(vm_clock);
68 /* PC cmos mappings */
70 #define REG_EQUIPMENT_BYTE 0x14
71 #define REG_IBM_CENTURY_BYTE 0x32
72 #define REG_IBM_PS2_CENTURY_BYTE 0x37
75 static inline int to_bcd(RTCState *s, int a)
77 return ((a / 10) << 4) | (a % 10);
80 static int cmos_get_fd_drive_type(int fd0)
86 /* 1.44 Mb 3"5 drive */
90 /* 2.88 Mb 3"5 drive */
94 /* 1.2 Mb 5"5 drive */
104 static void cmos_init(int ram_size, int boot_device)
106 RTCState *s = rtc_state;
112 /* set the CMOS date */
120 val = to_bcd(s, (tm->tm_year / 100) + 19);
121 rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
122 rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
124 /* various important CMOS locations needed by PC/Bochs bios */
127 val = 640; /* base memory in K */
128 rtc_set_memory(s, 0x15, val);
129 rtc_set_memory(s, 0x16, val >> 8);
131 val = (ram_size / 1024) - 1024;
134 rtc_set_memory(s, 0x17, val);
135 rtc_set_memory(s, 0x18, val >> 8);
136 rtc_set_memory(s, 0x30, val);
137 rtc_set_memory(s, 0x31, val >> 8);
139 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
142 rtc_set_memory(s, 0x34, val);
143 rtc_set_memory(s, 0x35, val >> 8);
145 switch(boot_device) {
148 rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
152 rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
155 rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
161 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
162 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
164 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
165 rtc_set_memory(s, 0x10, val);
177 val |= 0x01; /* 1 drive, ready for boot */
180 val |= 0x41; /* 2 drives, ready for boot */
183 val |= 0x02; /* FPU is there */
184 val |= 0x04; /* PS/2 mouse installed */
185 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
189 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
191 speaker_data_on = (val >> 1) & 1;
192 pit_set_gate(pit, 2, val & 1);
195 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
198 out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
199 dummy_refresh_clock ^= 1;
200 return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
201 (dummy_refresh_clock << 4);
204 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
206 cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
207 /* XXX: bit 0 is fast reset */
210 static uint32_t ioport92_read(void *opaque, uint32_t addr)
212 return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
215 /***********************************************************/
216 /* Bochs BIOS debug ports */
218 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
220 static const char shutdown_str[8] = "Shutdown";
221 static int shutdown_index = 0;
224 /* Bochs BIOS messages */
227 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
232 fprintf(stderr, "%c", val);
236 /* same as Bochs power off */
237 if (val == shutdown_str[shutdown_index]) {
239 if (shutdown_index == 8) {
241 qemu_system_shutdown_request();
248 /* LGPL'ed VGA BIOS messages */
251 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
256 fprintf(stderr, "%c", val);
262 void bochs_bios_init(void)
264 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
265 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
266 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
267 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
268 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
270 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
271 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
272 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
273 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
277 int load_kernel(const char *filename, uint8_t *addr,
283 fd = open(filename, O_RDONLY);
287 /* load 16 bit code */
288 if (read(fd, real_addr, 512) != 512)
290 setup_sects = real_addr[0x1F1];
293 if (read(fd, real_addr + 512, setup_sects * 512) !=
297 /* load 32 bit code */
298 size = read(fd, addr, 16 * 1024 * 1024);
308 static const int ide_iobase[2] = { 0x1f0, 0x170 };
309 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
310 static const int ide_irq[2] = { 14, 15 };
312 #define NE2000_NB_MAX 6
314 static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
315 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
317 /* PC hardware initialisation */
318 void pc_init(int ram_size, int vga_ram_size, int boot_device,
319 DisplayState *ds, const char **fd_filename, int snapshot,
320 const char *kernel_filename, const char *kernel_cmdline,
321 const char *initrd_filename)
324 int ret, linux_boot, initrd_size, i, nb_nics1, fd;
326 linux_boot = (kernel_filename != NULL);
329 cpu_register_physical_memory(0, ram_size, 0);
332 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
333 ret = load_image(buf, phys_ram_base + 0x000f0000);
334 if (ret != 0x10000) {
335 fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
340 if (cirrus_vga_enabled) {
341 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
343 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
345 ret = load_image(buf, phys_ram_base + 0x000c0000);
347 /* setup basic memory access */
348 cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
349 cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
350 cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
355 uint8_t bootsect[512];
356 uint8_t old_bootsect[512];
358 if (bs_table[0] == NULL) {
359 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
362 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
363 ret = load_image(buf, bootsect);
364 if (ret != sizeof(bootsect)) {
365 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
370 if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
371 /* copy the MSDOS partition table */
372 memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
375 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
377 /* now we can load the kernel */
378 ret = load_kernel(kernel_filename,
379 phys_ram_base + KERNEL_LOAD_ADDR,
380 phys_ram_base + KERNEL_PARAMS_ADDR);
382 fprintf(stderr, "qemu: could not load kernel '%s'\n",
389 if (initrd_filename) {
390 initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
391 if (initrd_size < 0) {
392 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
397 if (initrd_size > 0) {
398 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
399 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
401 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
403 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
404 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
405 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
407 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
415 /* init basic PC hardware */
416 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
418 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
420 if (cirrus_vga_enabled) {
422 pci_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
425 isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
429 vga_initialize(ds, phys_ram_base + ram_size, ram_size,
430 vga_ram_size, pci_enabled);
433 rtc_state = rtc_init(0x70, 8);
434 register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
435 register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
437 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
438 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
441 pit = pit_init(0x40, 0);
443 fd = serial_open_device();
444 serial_init(0x3f8, 4, fd);
447 for(i = 0; i < nb_nics; i++) {
448 pci_ne2000_init(&nd_table[i]);
450 pci_piix3_ide_init(bs_table);
453 if (nb_nics1 > NE2000_NB_MAX)
454 nb_nics1 = NE2000_NB_MAX;
455 for(i = 0; i < nb_nics1; i++) {
456 isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
459 for(i = 0; i < 2; i++) {
460 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
461 bs_table[2 * i], bs_table[2 * i + 1]);
470 /* no audio supported yet for win32 */
476 floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
478 cmos_init(ram_size, boot_device);
480 /* must be done after all PCI devices are instanciated */
481 /* XXX: should be done in the Bochs BIOS */