2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 /* output Bochs bios info messages */
29 #define BIOS_FILENAME "bios.bin"
30 #define VGABIOS_FILENAME "vgabios.bin"
31 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
32 #define LINUX_BOOT_FILENAME "linux_boot.bin"
34 #define KERNEL_LOAD_ADDR 0x00100000
35 #define INITRD_LOAD_ADDR 0x00400000
36 #define KERNEL_PARAMS_ADDR 0x00090000
37 #define KERNEL_CMDLINE_ADDR 0x00099000
40 int dummy_refresh_clock;
41 static fdctrl_t *floppy_controller;
42 static RTCState *rtc_state;
45 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
49 /* MSDOS compatibility mode FPU exception support */
50 /* XXX: add IGNNE support */
51 void cpu_set_ferr(CPUX86State *s)
56 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
63 uint64_t cpu_get_tsc(CPUX86State *env)
65 return qemu_get_clock(vm_clock);
68 /* PC cmos mappings */
70 #define REG_EQUIPMENT_BYTE 0x14
71 #define REG_IBM_CENTURY_BYTE 0x32
72 #define REG_IBM_PS2_CENTURY_BYTE 0x37
75 static inline int to_bcd(RTCState *s, int a)
77 return ((a / 10) << 4) | (a % 10);
80 static int cmos_get_fd_drive_type(int fd0)
86 /* 1.44 Mb 3"5 drive */
90 /* 2.88 Mb 3"5 drive */
94 /* 1.2 Mb 5"5 drive */
104 static void cmos_init(int ram_size, int boot_device)
106 RTCState *s = rtc_state;
112 /* set the CMOS date */
120 val = to_bcd(s, (tm->tm_year / 100) + 19);
121 rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
122 rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
124 /* various important CMOS locations needed by PC/Bochs bios */
127 val = 640; /* base memory in K */
128 rtc_set_memory(s, 0x15, val);
129 rtc_set_memory(s, 0x16, val >> 8);
131 val = (ram_size / 1024) - 1024;
134 rtc_set_memory(s, 0x17, val);
135 rtc_set_memory(s, 0x18, val >> 8);
136 rtc_set_memory(s, 0x30, val);
137 rtc_set_memory(s, 0x31, val >> 8);
139 if (ram_size > (16 * 1024 * 1024))
140 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
145 rtc_set_memory(s, 0x34, val);
146 rtc_set_memory(s, 0x35, val >> 8);
148 switch(boot_device) {
151 rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
155 rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
158 rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
164 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
165 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
167 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
168 rtc_set_memory(s, 0x10, val);
180 val |= 0x01; /* 1 drive, ready for boot */
183 val |= 0x41; /* 2 drives, ready for boot */
186 val |= 0x02; /* FPU is there */
187 val |= 0x04; /* PS/2 mouse installed */
188 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
192 static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
194 speaker_data_on = (val >> 1) & 1;
195 pit_set_gate(pit, 2, val & 1);
198 static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
201 out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
202 dummy_refresh_clock ^= 1;
203 return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
204 (dummy_refresh_clock << 4);
207 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
209 cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
210 /* XXX: bit 0 is fast reset */
213 static uint32_t ioport92_read(void *opaque, uint32_t addr)
215 return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
218 /***********************************************************/
219 /* Bochs BIOS debug ports */
221 void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
223 static const char shutdown_str[8] = "Shutdown";
224 static int shutdown_index = 0;
227 /* Bochs BIOS messages */
230 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
235 fprintf(stderr, "%c", val);
239 /* same as Bochs power off */
240 if (val == shutdown_str[shutdown_index]) {
242 if (shutdown_index == 8) {
244 qemu_system_shutdown_request();
251 /* LGPL'ed VGA BIOS messages */
254 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
259 fprintf(stderr, "%c", val);
265 void bochs_bios_init(void)
267 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
268 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
269 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
270 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
271 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
273 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
274 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
275 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
276 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
280 int load_kernel(const char *filename, uint8_t *addr,
286 fd = open(filename, O_RDONLY);
290 /* load 16 bit code */
291 if (read(fd, real_addr, 512) != 512)
293 setup_sects = real_addr[0x1F1];
296 if (read(fd, real_addr + 512, setup_sects * 512) !=
300 /* load 32 bit code */
301 size = read(fd, addr, 16 * 1024 * 1024);
311 static const int ide_iobase[2] = { 0x1f0, 0x170 };
312 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
313 static const int ide_irq[2] = { 14, 15 };
315 #define NE2000_NB_MAX 6
317 static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
318 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
320 /* PC hardware initialisation */
321 void pc_init(int ram_size, int vga_ram_size, int boot_device,
322 DisplayState *ds, const char **fd_filename, int snapshot,
323 const char *kernel_filename, const char *kernel_cmdline,
324 const char *initrd_filename)
327 int ret, linux_boot, initrd_size, i, nb_nics1, fd;
328 unsigned long bios_offset, vga_bios_offset;
329 int bios_size, isa_bios_size;
332 linux_boot = (kernel_filename != NULL);
335 cpu_register_physical_memory(0, ram_size, 0);
338 bios_offset = ram_size + vga_ram_size;
339 vga_bios_offset = bios_offset + 256 * 1024;
341 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
342 bios_size = get_image_size(buf);
343 if (bios_size <= 0 ||
344 (bios_size % 65536) != 0 ||
345 bios_size > (256 * 1024)) {
348 ret = load_image(buf, phys_ram_base + bios_offset);
349 if (ret != bios_size) {
351 fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
356 if (cirrus_vga_enabled) {
357 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
359 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
361 ret = load_image(buf, phys_ram_base + vga_bios_offset);
363 /* setup basic memory access */
364 cpu_register_physical_memory(0xc0000, 0x10000,
365 vga_bios_offset | IO_MEM_ROM);
367 /* map the last 128KB of the BIOS in ISA space */
368 isa_bios_size = bios_size;
369 if (isa_bios_size > (128 * 1024))
370 isa_bios_size = 128 * 1024;
371 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
373 cpu_register_physical_memory(0x100000 - isa_bios_size,
375 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
376 /* map all the bios at the top of memory */
377 cpu_register_physical_memory((uint32_t)(-bios_size),
378 bios_size, bios_offset | IO_MEM_ROM);
383 uint8_t bootsect[512];
384 uint8_t old_bootsect[512];
386 if (bs_table[0] == NULL) {
387 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
390 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
391 ret = load_image(buf, bootsect);
392 if (ret != sizeof(bootsect)) {
393 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
398 if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
399 /* copy the MSDOS partition table */
400 memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
403 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
405 /* now we can load the kernel */
406 ret = load_kernel(kernel_filename,
407 phys_ram_base + KERNEL_LOAD_ADDR,
408 phys_ram_base + KERNEL_PARAMS_ADDR);
410 fprintf(stderr, "qemu: could not load kernel '%s'\n",
417 if (initrd_filename) {
418 initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
419 if (initrd_size < 0) {
420 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
425 if (initrd_size > 0) {
426 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
427 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
429 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
431 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
432 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
433 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
435 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
439 pci_bus = i440fx_init();
445 /* init basic PC hardware */
446 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
448 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
450 if (cirrus_vga_enabled) {
452 pci_cirrus_vga_init(pci_bus,
453 ds, phys_ram_base + ram_size, ram_size,
456 isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
460 vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
464 rtc_state = rtc_init(0x70, 8);
465 register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
466 register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
468 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
469 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
472 pit = pit_init(0x40, 0);
474 fd = serial_open_device();
475 serial_init(0x3f8, 4, fd);
478 for(i = 0; i < nb_nics; i++) {
479 pci_ne2000_init(pci_bus, &nd_table[i]);
481 pci_piix3_ide_init(pci_bus, bs_table);
484 if (nb_nics1 > NE2000_NB_MAX)
485 nb_nics1 = NE2000_NB_MAX;
486 for(i = 0; i < nb_nics1; i++) {
487 isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
490 for(i = 0; i < 2; i++) {
491 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
492 bs_table[2 * i], bs_table[2 * i + 1]);
501 /* no audio supported yet for win32 */
507 floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
509 cmos_init(ram_size, boot_device);
511 /* must be done after all PCI devices are instanciated */
512 /* XXX: should be done in the Bochs BIOS */