3 #define BIOS_FILENAME "mips_bios.bin"
4 //#define BIOS_FILENAME "system.bin"
5 #define KERNEL_LOAD_ADDR 0x80010000
6 #define INITRD_LOAD_ADDR 0x80800000
8 #define VIRT_TO_PHYS_ADDEND (-0x80000000LL)
14 static void pic_irq_request(void *opaque, int level)
16 CPUState *env = first_cpu;
18 env->CP0_Cause |= 0x00000400;
19 cpu_interrupt(env, CPU_INTERRUPT_HARD);
21 env->CP0_Cause &= ~0x00000400;
22 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
26 void cpu_mips_irqctrl_init (void)
30 uint32_t cpu_mips_get_random (CPUState *env)
32 uint32_t now = qemu_get_clock(vm_clock);
34 return now % (MIPS_TLB_NB - env->CP0_Wired) + env->CP0_Wired;
38 uint32_t cpu_mips_get_count (CPUState *env)
40 return env->CP0_Count +
41 (uint32_t)muldiv64(qemu_get_clock(vm_clock),
42 100 * 1000 * 1000, ticks_per_sec);
45 static void cpu_mips_update_count (CPUState *env, uint32_t count,
54 now = qemu_get_clock(vm_clock);
55 next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000);
60 fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n",
61 __func__, now, count, compare, next - now);
64 /* Store new count and compare registers */
65 env->CP0_Compare = compare;
67 count - (uint32_t)muldiv64(now, 100 * 1000 * 1000, ticks_per_sec);
69 qemu_mod_timer(env->timer, next);
72 void cpu_mips_store_count (CPUState *env, uint32_t value)
74 cpu_mips_update_count(env, value, env->CP0_Compare);
77 void cpu_mips_store_compare (CPUState *env, uint32_t value)
79 cpu_mips_update_count(env, cpu_mips_get_count(env), value);
80 env->CP0_Cause &= ~0x00008000;
81 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
84 static void mips_timer_cb (void *opaque)
91 fprintf(logfile, "%s\n", __func__);
94 cpu_mips_update_count(env, cpu_mips_get_count(env), env->CP0_Compare);
95 env->CP0_Cause |= 0x00008000;
96 cpu_interrupt(env, CPU_INTERRUPT_HARD);
99 void cpu_mips_clock_init (CPUState *env)
101 env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
102 env->CP0_Compare = 0;
103 cpu_mips_update_count(env, 1, 0);
107 static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
111 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
113 cpu_outb(NULL, addr & 0xffff, value);
116 static uint32_t io_readb (void *opaque, target_phys_addr_t addr)
118 uint32_t ret = cpu_inb(NULL, addr & 0xffff);
121 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
126 static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value)
130 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
132 #ifdef TARGET_WORDS_BIGENDIAN
133 value = bswap16(value);
135 cpu_outw(NULL, addr & 0xffff, value);
138 static uint32_t io_readw (void *opaque, target_phys_addr_t addr)
140 uint32_t ret = cpu_inw(NULL, addr & 0xffff);
141 #ifdef TARGET_WORDS_BIGENDIAN
146 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
151 static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
155 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value);
157 #ifdef TARGET_WORDS_BIGENDIAN
158 value = bswap32(value);
160 cpu_outl(NULL, addr & 0xffff, value);
163 static uint32_t io_readl (void *opaque, target_phys_addr_t addr)
165 uint32_t ret = cpu_inl(NULL, addr & 0xffff);
167 #ifdef TARGET_WORDS_BIGENDIAN
172 fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret);
177 CPUWriteMemoryFunc *io_write[] = {
183 CPUReadMemoryFunc *io_read[] = {
189 void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device,
190 DisplayState *ds, const char **fd_filename, int snapshot,
191 const char *kernel_filename, const char *kernel_cmdline,
192 const char *initrd_filename)
196 unsigned long bios_offset;
203 register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
206 cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
208 /* Try to load a BIOS image. If this fails, we continue regardless,
209 but initialize the hardware ourselves. When a kernel gets
210 preloaded we also initialize the hardware, since the BIOS wasn't
212 bios_offset = ram_size + vga_ram_size;
213 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
214 printf("%s: load BIOS '%s' size %d\n", __func__, buf, BIOS_SIZE);
215 ret = load_image(buf, phys_ram_base + bios_offset);
216 if (ret == BIOS_SIZE) {
217 cpu_register_physical_memory((uint32_t)(0x1fc00000),
218 BIOS_SIZE, bios_offset | IO_MEM_ROM);
219 env->PC = 0xBFC00000;
220 if (!kernel_filename)
224 fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n",
229 if (kernel_filename) {
230 kernel_size = load_elf(kernel_filename, VIRT_TO_PHYS_ADDEND, &entry);
231 if (kernel_size >= 0)
234 kernel_size = load_image(kernel_filename,
235 phys_ram_base + KERNEL_LOAD_ADDR + VIRT_TO_PHYS_ADDEND);
236 if (kernel_size < 0) {
237 fprintf(stderr, "qemu: could not load kernel '%s'\n",
241 env->PC = KERNEL_LOAD_ADDR;
245 if (initrd_filename) {
246 if (load_image(initrd_filename,
247 phys_ram_base + INITRD_LOAD_ADDR + VIRT_TO_PHYS_ADDEND)
248 == (target_ulong) -1) {
249 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
255 /* Store command line. */
256 strcpy (phys_ram_base + (16 << 20) - 256, kernel_cmdline);
257 /* FIXME: little endian support */
258 *(int *)(phys_ram_base + (16 << 20) - 260) = tswap32 (0x12345678);
259 *(int *)(phys_ram_base + (16 << 20) - 264) = tswap32 (ram_size);
262 /* Init internal devices */
263 cpu_mips_clock_init(env);
264 cpu_mips_irqctrl_init();
266 /* Register 64 KB of ISA IO space at 0x14000000 */
267 io_memory = cpu_register_io_memory(0, io_read, io_write, NULL);
268 cpu_register_physical_memory(0x14000000, 0x00010000, io_memory);
269 isa_mem_base = 0x10000000;
271 isa_pic = pic_init(pic_irq_request, env);
272 pit = pit_init(0x40, 0);
273 serial_init(&pic_set_irq_new, isa_pic, 0x3f8, 4, serial_hds[0]);
274 vga_initialize(NULL, ds, phys_ram_base + ram_size, ram_size,
277 if (nd_table[0].vlan) {
278 if (nd_table[0].model == NULL
279 || strcmp(nd_table[0].model, "ne2k_isa") == 0) {
280 isa_ne2000_init(0x300, 9, &nd_table[0]);
282 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
288 QEMUMachine mips_machine = {