Maemo patchset 20101501+0m5

[h-e-n] / sound / soc / omap / omap-mcbsp.c

diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index 8485a8a..1abd576 100644 (file)
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -36,9 +36,7 @@
 #include "omap-mcbsp.h"
 #include "omap-pcm.h"
 
-#define OMAP_MCBSP_RATES       (SNDRV_PCM_RATE_44100 | \
-                                SNDRV_PCM_RATE_48000 | \
-                                SNDRV_PCM_RATE_KNOT)
+#define OMAP_MCBSP_RATES       (SNDRV_PCM_RATE_8000_96000)
 
 struct omap_mcbsp_data {
        unsigned int                    bus_id;
@@ -178,6 +176,11 @@ static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd)
        case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
                if (!mcbsp_data->active++)
                        omap_mcbsp_start(mcbsp_data->bus_id);
+               /* Make sure data transfer is frame synchronized */
+               if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+                       omap_mcbsp_xmit_enable(mcbsp_data->bus_id, 1);
+               else
+                       omap_mcbsp_recv_enable(mcbsp_data->bus_id, 1);
                break;
 
        case SNDRV_PCM_TRIGGER_STOP:
@@ -201,8 +204,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
        struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
        struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
        int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id;
-       int wlen;
+       int wlen, channels, wpf;
        unsigned long port;
+       unsigned int format;
 
        if (cpu_class_is_omap1()) {
                dma = omap1_dma_reqs[bus_id][substream->stream];
@@ -230,13 +234,25 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
                return 0;
        }
 
-       switch (params_channels(params)) {
+       format = mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
+       wpf = channels = params_channels(params);
+       switch (channels) {
        case 2:
-               /* Set 1 word per (McBPSP) frame and use dual-phase frames */
-               regs->rcr2      |= RFRLEN2(1 - 1) | RPHASE;
-               regs->rcr1      |= RFRLEN1(1 - 1);
-               regs->xcr2      |= XFRLEN2(1 - 1) | XPHASE;
-               regs->xcr1      |= XFRLEN1(1 - 1);
+               if (format == SND_SOC_DAIFMT_I2S ||
+                   format == SND_SOC_DAIFMT_LEFT_J) {
+                       /* Use dual-phase frames */
+                       regs->rcr2      |= RPHASE;
+                       regs->xcr2      |= XPHASE;
+                       /* Set 1 word per (McBSP) frame for phase1 and phase2 */
+                       wpf--;
+                       regs->rcr2      |= RFRLEN2(wpf - 1);
+                       regs->xcr2      |= XFRLEN2(wpf - 1);
+               }
+       case 1:
+       case 4:
+               /* Set word per (McBSP) frame for phase1 */
+               regs->rcr1      |= RFRLEN1(wpf - 1);
+               regs->xcr1      |= XFRLEN1(wpf - 1);
                break;
        default:
                /* Unsupported number of channels */
@@ -258,14 +274,16 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream,
        }
 
        /* Set FS period and length in terms of bit clock periods */
-       switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+       switch (format) {
        case SND_SOC_DAIFMT_I2S:
+       case SND_SOC_DAIFMT_LEFT_J:
                regs->srgr2     |= FPER(wlen * 2 - 1);
                regs->srgr1     |= FWID(wlen - 1);
                break;
        case SND_SOC_DAIFMT_DSP_A:
-               regs->srgr2     |= FPER(wlen * 2 - 1);
-               regs->srgr1     |= FWID(wlen * 2 - 2);
+       case SND_SOC_DAIFMT_DSP_B:
+               regs->srgr2     |= FPER(wlen * channels - 1);
+               regs->srgr1     |= FWID(0);
                break;
        }
 
@@ -284,6 +302,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
 {
        struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data);
        struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
+       unsigned int temp_fmt = fmt;
 
        if (mcbsp_data->configured)
                return 0;
@@ -293,19 +312,42 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
        /* Generic McBSP register settings */
        regs->spcr2     |= XINTM(3) | FREE;
        regs->spcr1     |= RINTM(3);
-       regs->rcr2      |= RFIG;
-       regs->xcr2      |= XFIG;
+       /* RFIG and XFIG are not defined in 34xx */
+       if (!cpu_is_omap34xx()) {
+               regs->rcr2      |= RFIG;
+               regs->xcr2      |= XFIG;
+       }
 
        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
        case SND_SOC_DAIFMT_I2S:
                /* 1-bit data delay */
                regs->rcr2      |= RDATDLY(1);
                regs->xcr2      |= XDATDLY(1);
+               regs->rccr      |= RFULL_CYCLE | RDMAEN | RDISABLE;
+               regs->xccr      |= (DXENDLY(1) | XDMAEN | XDISABLE);
+               break;
+       case SND_SOC_DAIFMT_LEFT_J:
+               regs->rcr2      |= RDATDLY(0);
+               regs->xcr2      |= XDATDLY(0);
+               regs->spcr1     |= RJUST(2);
+               regs->rccr      |= RFULL_CYCLE | RDMAEN | RDISABLE;
+               regs->xccr      |= (DXENDLY(1) | XDMAEN | XDISABLE);
                break;
        case SND_SOC_DAIFMT_DSP_A:
+               /* 1-bit data delay */
+               regs->rcr2      |= RDATDLY(1);
+               regs->xcr2      |= XDATDLY(1);
+               regs->rccr      |= RFULL_CYCLE | RDMAEN | RDISABLE;
+               regs->xccr      |= (DXENDLY(1) | XDMAEN | XDISABLE);
+               temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
+               break;
+       case SND_SOC_DAIFMT_DSP_B:
                /* 0-bit data delay */
                regs->rcr2      |= RDATDLY(0);
                regs->xcr2      |= XDATDLY(0);
+               regs->rccr      |= RFULL_CYCLE | RDMAEN | RDISABLE;
+               regs->xccr      |= (DXENDLY(1) | XDMAEN | XDISABLE);
+               temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
                break;
        default:
                /* Unsupported data format */
@@ -329,7 +371,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
        }
 
        /* Set bit clock (CLKX/CLKR) and FS polarities */
-       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+       switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) {
        case SND_SOC_DAIFMT_NB_NF:
                /*
                 * Normal BCLK + FS.
@@ -452,18 +494,18 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
 
 #define OMAP_MCBSP_DAI_BUILDER(link_id)                                \
 {                                                              \
-       .name = "omap-mcbsp-dai-(link_id)",                     \
+       .name = "omap-mcbsp-dai-"#link_id,                      \
        .id = (link_id),                                        \
        .type = SND_SOC_DAI_I2S,                                \
        .playback = {                                           \
-               .channels_min = 2,                              \
-               .channels_max = 2,                              \
+               .channels_min = 1,                              \
+               .channels_max = 4,                              \
                .rates = OMAP_MCBSP_RATES,                      \
                .formats = SNDRV_PCM_FMTBIT_S16_LE,             \
        },                                                      \
        .capture = {                                            \
-               .channels_min = 2,                              \
-               .channels_max = 2,                              \
+               .channels_min = 1,                              \
+               .channels_max = 4,                              \
                .rates = OMAP_MCBSP_RATES,                      \
                .formats = SNDRV_PCM_FMTBIT_S16_LE,             \
        },                                                      \