Merge branch 'master' of /home/nchip/public_html/qemu into garage-push

[qemu] / alpha-dis.c

diff --git a/alpha-dis.c b/alpha-dis.c
index ebda048..ee7bf66 100644 (file)
--- a/alpha-dis.c
+++ b/alpha-dis.c
@@ -17,15 +17,12 @@ the GNU General Public License for more details.
 
 You should have received a copy of the GNU General Public License
 along with this file; see the file COPYING.  If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA
-02111-1307, USA.  */
+Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
+02110-1301, USA.  */
 
 #include <stdio.h>
 #include "dis-asm.h"
 
-#define ATTRIBUTE_UNUSED __attribute__((unused))
-#define _(x) x
-
 /* The opcode table is an array of struct alpha_opcode.  */
 
 struct alpha_opcode
@@ -248,19 +245,6 @@ enum bfd_reloc_code_real {
     BFD_RELOC_ALPHA_HINT
 };
 
-bfd_vma
-bfd_getl32 (addr)
-     register const bfd_byte *addr;
-{
-  unsigned long v;
-
-  v = (unsigned long) addr[0];
-  v |= (unsigned long) addr[1] << 8;
-  v |= (unsigned long) addr[2] << 16;
-  v |= (unsigned long) addr[3] << 24;
-  return (bfd_vma) v;
-}
-
 /* This file holds the Alpha AXP opcode table.  The opcode table includes
    almost all of the extended instruction mnemonics.  This permits the
    disassembler to use them, and simplifies the assembler logic, at the
@@ -390,7 +374,7 @@ const struct alpha_operand alpha_operands[] =
 
   /* The signed "23-bit" aligned displacement of Branch format insns */
 #define BDISP          (MDISP + 1)
-  { 21, 0, BFD_RELOC_23_PCREL_S2, 
+  { 21, 0, BFD_RELOC_23_PCREL_S2,
     AXP_OPERAND_RELATIVE, insert_bdisp, extract_bdisp },
 
   /* The 26-bit PALcode function */