From 21ae5e0ac60c2f679c019655a3d2982fe685ce2a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Juha=20Riihim=C3=A4ki?= Date: Fri, 3 Apr 2009 13:01:15 +0300 Subject: [PATCH] correct twl4030 phy_clk_ctrl_sts register behavior --- hw/twl4030.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/twl4030.c b/hw/twl4030.c index 86df6fb..7a62c5a 100644 --- a/hw/twl4030.c +++ b/hw/twl4030.c @@ -221,8 +221,10 @@ static uint8_t twl4030_48_read(void *opaque, uint8_t addr) case 0xfd: /* PHY_PWR_CTRL */ case 0xfe: /* PHY_CLK_CTRL */ return s->reg_data[addr]; - case 0xff: /* PHY_CLK_CTRL */ - return s->reg_data[0xfe] & 0x1; + case 0xff: /* PHY_CLK_CTRL_STS */ + if (s->reg_data[0xfe] & 1) /* REQ_PHY_DPLL_CLK */ + return 1; + return (s->reg_data[0x04] >> 6) & 1; /* SUSPENDM */ default: fprintf(stderr, "%s: unknown register 0x%02x pc 0x%x\n", __FUNCTION__, addr, cpu_single_env->regs[15]); -- 1.7.9.5