Remove leftover file, should have happened in the Linux loader rewrite commit.
[qemu] / target-mips /
2007-05-19 thsMore MIPS 64-bit FPU support.
2007-05-19 thsFix slti/sltiu for MIPS64, by Aurelien Jarno.
2007-05-19 thsFix ldl/ldr implementation, by Aurelien Jarno.
2007-05-18 ths- Move FPU exception handling into helper functions...
2007-05-18 thsWork around the lack of proper handling for self-modify...
2007-05-16 thsMore generic 64 bit multiplication support, by Aurelien...
2007-05-13 thsFull MIPS64 MMU implementation, by Aurelien Jarno.
2007-05-13 thsFix mfc0 and dmtc0 instructions on MIPS64, by Aurelien...
2007-05-13 thsDelete misleading comment.
2007-05-13 thsDon't decode CP0 XContext on 32bit MIPS.
2007-05-13 thsMMU code improvements, by Aurelien Jarno.
2007-05-13 thsMIPS linux-user update.
2007-05-13 thsMIPS TLB style selection at runtime, by Herve Poussineau.
2007-05-11 thsImplemented cabs FP instructions, and improve exception...
2007-05-11 thsAnother bit of nicer debug output.
2007-05-11 thsImplement FP madd/msub, wire up bc1any[24][ft].
2007-05-11 thsImproved debug output for the MIPS opcode decoder.
2007-05-11 thsFix missing status ro mask initialization, thanks Stefa...
2007-05-10 thsFix for the scd instruction, by Aurelien Jarno.
2007-05-09 thsPreliminary MIPS 64-bit MMU implementation, by Aurelien...
2007-05-09 thsFix MIPS64 address computation specialcase, by Aurelien...
2007-05-08 thsWork around gcc's mips define, spotted by Stefan Weil.
2007-05-07 thsMIPS 64-bit FPU support, plus some collateral bugfixes...
2007-05-07 thsUpdate TODO.
2007-05-07 thsClear BD slot on next exception if appropriate.
2007-05-05 thsFix a really stupid bug in the [ls]d[lr] emulation...
2007-04-29 thsKill broken host register definitions, thanks to Paul...
2007-04-29 thsRevert last checkin.
2007-04-29 thsHopefully the final fix for LUI sign extensions.
2007-04-28 thsUpdate TODO.
2007-04-25 thsNext attempt to get the lui sign extension right.
2007-04-25 thsFix lui sign extension.
2007-04-19 thsUpdate comment. We can't easily adhere to the architect...
2007-04-17 thsChoose number of TLBs at runtime, by Herve Poussineau.
2007-04-16 thsSimplify branch likely handling.
2007-04-15 thsDon't use T2 for INS, it conflicts with branch delay...
2007-04-15 thsFix qemu SIGFPE caused by division-by-zero due to under...
2007-04-15 thsSmall code generation optimization.
2007-04-15 thsDelete unused define.
2007-04-14 thsRestart interrupts after an exception.
2007-04-13 thsNicer Log formatting.
2007-04-13 thsAnother fix for CP0 Cause register handling.
2007-04-11 thsMake SYNCI_Step and CCRes CPU-specific.
2007-04-11 thsThrow RI for invalid MFMC0-class instructions. Introduc...
2007-04-11 thsCode formatting fix.
2007-04-11 thsMore Context/Xcontext fixes. Ifdef some 64bit-only...
2007-04-09 thsFix CP0_IntCtl handling.
2007-04-09 thsProper handling of reserved bits in the context register.
2007-04-09 thsMark watchpoint features as unimplemented.
2007-04-09 thsCatch unaligned sc/scd.
2007-04-09 thsFix exception handling cornercase for rdhwr.
2007-04-09 thsRemove bogus mtc0 handling.
2007-04-07 pbrookUnify IRQ handling.
2007-04-07 j_mayercpu_get_phys_page_debug should return target_phys_addr_t
2007-04-07 thsImplement prefx.
2007-04-07 thsSet proper BadVAddress value for unaligned instruction...
2007-04-07 thsActually skip over delay slot for a non-taken branch...
2007-04-07 thsFix ins/ext cornercase.
2007-04-06 thsFix handling of ADES exceptions.
2007-04-06 thsSave state for all CP0 instructions, they may throw...
2007-04-05 thsfix branch delay slot cornercases.
2007-04-05 thsFix rotr immediate ops, mask shift/rotate arguments...
2007-04-05 thsHandle EBase properly.
2007-04-05 thsFix RDHWR handling. Code formatting. Don't use *_direct...
2007-04-05 ths64bit MIPS FPUs have 32 registers.
2007-04-04 thsFix code formatting.
2007-04-02 thsMIPS32R2 needs RDPGPR/WRPGPR instructions even when...
2007-04-02 thsBuild fix for 64bit machines. (This is still not correc...
2007-04-01 thsActually enable 64bit configuration.
2007-04-01 thsMIPS64 configurations.
2007-03-31 thsMalta CBUS UART support.
2007-03-30 thsUpdate mips TODO.
2007-03-30 thsFix typo, suggested by Ben Taylor.
2007-03-30 thsSquash logic bugs while they are fresh...
2007-03-30 thsSanitize mips exception handling.
2007-03-24 thsOne more bit of mips CPU configuration, and support...
2007-03-23 thsFix enough FPU/R2 support to get 24Kf going.
2007-03-21 thsMove mips CPU specific initialization to translate_init.c.
2007-03-19 thsBarf on branches/jumps in branch delay slots. Spotted...
2007-03-19 thsDefine gen_intermediate_code_internal as "static inline".
2007-03-19 thsSPARC host fixes, by Ben Taylor.
2007-03-18 thsFix BD flag handling, cause register contents, implemen...
2007-03-18 thsMIPS -cpu selection support, by Herve Poussineau.
2007-03-17 thsNote FPU enable/disable issue.
2007-03-02 thsMIPS Userland TLS register emulation, by Daniel Jacobowitz.
2007-02-28 thsMIPS FPU dynamic activation, part 1, by Herve Poussineau.
2007-02-27 thsFix mips FPU emulation, 32 bit data types are allowed...
2007-02-20 thsReplace TLSZ with TARGET_FMT_lx.
2007-02-18 thsFix sign-extension of VPN field in TLB, by Herve Poussi...
2007-02-02 thsUpdate MIPS TODO.
2007-02-02 thsSparc arm/mips/sparc register patch, by Martin Bochnig.
2007-01-24 thsEBase is limited to KSEG0/KSEG1 even on 64bit CPUs.
2007-01-24 thsReworking MIPS interrupt handling, by Aurelien Jarno.
2007-01-23 thsImplementing dmfc/dmtc.
2007-01-22 thsUpdate TODO.
2007-01-22 thsFix PageMask handling, second part.
2007-01-21 thsTLB address wraparound hopefully fixed now.
2007-01-21 thsBring TLB / PageSize handling in line with real hardwar...
2007-01-19 thsNote more issues.
2007-01-17 thsKeep track of mips related issues.
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