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Special-case iWMMXt register transfer insns, which are in ARM LDC2/STC2 class.
[qemu]
/
cpu-defs.h
2007-06-26
balrog
Fix writes to pages containing watchpoints for the...
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commitdiff
2007-04-14
j_mayer
Add TARGET_FMT_plx to properly display target_phys_addr...
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commitdiff
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diff to current
2007-04-05
j_mayer
Infrastructure to support more than 2 MMU modes.
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commitdiff
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diff to current
2007-04-04
j_mayer
TARGET_FMT_ld may also be useful for debugging purposes.
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diff to current
2007-03-16
pbrook
Watchpoint support (previous commit got eaten by Savann...
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diff to current
2006-11-12
pbrook
Speed up tlb_flush_page (Daniel Jacobowitz).
blob
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commitdiff
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diff to current
2006-06-25
bellard
C99 64 bit printf
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diff to current
2005-11-28
bellard
PAGE_EXEC support in TLBs
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diff to current
2005-11-23
bellard
better halted state support
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diff to current
2005-11-21
bellard
SMP support
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diff to current
2005-11-20
bellard
added CPU_COMMON and CPUState.tb_jmp_cache[]
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2005-08-21
bellard
ram_addr_t type for ram offsets
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2005-07-02
bellard
simplified PowerPC exception handling (Jocelyn Mayer)
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diff to current
2005-06-05
bellard
added HOST_LONG_BITS in configure
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2005-01-03
bellard
64 bit target support
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2004-04-26
bellard
amd64 port (Jocelyn Mayer)
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2004-04-25
bellard
added target_phys_addr_t
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diff to current
2004-03-21
bellard
do not depend on thunk.h - more log items
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2004-02-16
bellard
use osdep.h
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2004-01-24
bellard
correct target_ulong definition
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2003-10-27
bellard
comments
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2003-08-10
bellard
soft mmu support
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diff to current