From: aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Mon, 1 Sep 2008 22:12:14 +0000 (+0000)
Subject: SH4: Remove dyngen leftovers
X-Git-Tag: 0.10.0-0maemo1~1217
X-Git-Url: http://vcs.maemo.org/git/?a=commitdiff_plain;h=17b086f71b84df254ce9372b3d21db3e31a5f2c8;p=qemu

SH4: Remove dyngen leftovers

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5126 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 021aced..01c2a07 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -98,9 +98,7 @@ typedef struct CPUSH4State {
     uint32_t fpscr;		/* floating point status/control register */
     uint32_t fpul;		/* floating point communication register */
 
-    /* temporary float registers */
-    float32 ft0, ft1;
-    float64 dt0, dt1;
+    /* float point status register */
     float_status fp_status;
 
     /* Those belong to the specific unit (SH7750) but are handled here */
diff --git a/target-sh4/exec.h b/target-sh4/exec.h
index eb80d92..f2e6fea 100644
--- a/target-sh4/exec.h
+++ b/target-sh4/exec.h
@@ -24,14 +24,6 @@
 #include "dyngen-exec.h"
 
 register struct CPUSH4State *env asm(AREG0);
-register uint32_t T0 asm(AREG1);
-register uint32_t T1 asm(AREG2);
-//register uint32_t T2 asm(AREG3);
-
-#define FT0 (env->ft0)
-#define FT1 (env->ft1)
-#define DT0 (env->dt0)
-#define DT1 (env->dt1)
 
 #include "cpu.h"
 #include "exec-all.h"
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index ff43882..67056e8 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -67,9 +67,6 @@ static TCGv cpu_pr, cpu_fpscr, cpu_fpul, cpu_flags;
 /* internal register indexes */
 static TCGv cpu_flags, cpu_delayed_pc;
 
-/* dyngen register indexes */
-static TCGv cpu_T[2];
-
 #include "gen-icount.h"
 
 static void sh4_translate_init(void)
@@ -88,8 +85,6 @@ static void sh4_translate_init(void)
         return;
 
     cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
-    cpu_T[0] = tcg_global_reg_new(TCG_TYPE_I32, TCG_AREG1, "T0");
-    cpu_T[1] = tcg_global_reg_new(TCG_TYPE_I32, TCG_AREG2, "T1");
 
     for (i = 0; i < 24; i++)
         cpu_gregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,